i965/vs: Teach copy propagation about sends from GRFs.

This incidentally also teaches it a bit about gen6 math -- we now allow
unswizzled, unmodified GRF temps as the sources for math.

Reviewed-by: Kenneth Graunke <[email protected]>

3 files changed, 29 insertions, 7 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp b/src/mesa/drivers/dri/i965/brw_vec4.cpp
index 91b72f7f20b..35dd9aed43c 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp
@@ -225,6 +225,18 @@ vec4_instruction::is_send_from_grf()
    return false;
 }
 
+bool
+vec4_visitor::can_do_source_mods(vec4_instruction *inst)
+{
+   if (intel->gen == 6 && inst->is_math())
+      return false;
+
+   if (inst->is_send_from_grf())
+      return false;
+
+   return true;
+}
+
 /**
  * Returns how many MRFs an opcode will write over.
  *
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index 38d06d0e535..1f832d19cd8 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -338,6 +338,8 @@ public:
    bool opt_algebraic();
    bool opt_register_coalesce();
 
+   bool can_do_source_mods(vec4_instruction *inst);
+
    vec4_instruction *emit(vec4_instruction *inst);
 
    vec4_instruction *emit(enum opcode opcode);
@@ -390,6 +392,10 @@ public:
 			       vec4_instruction *pre_rhs_inst,
 			       vec4_instruction *last_rhs_inst);
 
+   bool try_copy_propagation(struct intel_context *intel,
+                             vec4_instruction *inst, int arg,
+                             src_reg *values[4]);
+
    /** Walks an exec_list of ir_instruction and sends it through this visitor. */
    void visit_instructions(const exec_list *list);
 
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
index ca757c3c900..51ee4750490 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_copy_propagation.cpp
@@ -159,9 +159,10 @@ try_constant_propagation(vec4_instruction *inst, int arg, src_reg *values[4])
    return false;
 }
 
-static bool
-try_copy_propagation(struct intel_context *intel,
-		     vec4_instruction *inst, int arg, src_reg *values[4])
+bool
+vec4_visitor::try_copy_propagation(struct intel_context *intel,
+                                   vec4_instruction *inst, int arg,
+                                   src_reg *values[4])
 {
    /* For constant propagation, we only handle the same constant
     * across all 4 channels.  Some day, we should handle the 8-bit
@@ -204,11 +205,14 @@ try_copy_propagation(struct intel_context *intel,
    if (inst->src[arg].negate)
       value.negate = !value.negate;
 
-   /* FINISHME: We can't copy-propagate things that aren't normal
-    * vec8s into gen6 math instructions, because of the weird src
-    * handling for those instructions.  Just ignore them for now.
+   bool has_source_modifiers = (value.negate || value.abs ||
+                                value.swizzle != BRW_SWIZZLE_XYZW ||
+                                value.file == UNIFORM);
+
+   /* gen6 math and gen7+ SENDs from GRFs ignore source modifiers on
+    * instructions.
     */
-   if (intel->gen >= 6 && inst->is_math())
+   if (has_source_modifiers && !can_do_source_mods(inst))
       return false;
 
    /* We can't copy-propagate a UD negation into a condmod