gallium: Drop the NRM and NRM4 opcodes.

They weren't generated in tree, and as far as I know all hardware had to
lower it to a DP, RSQ, MUL.

Reviewed-by: Jose Fonseca <[email protected]>

11 files changed, 10 insertions, 347 deletions

diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c
index f2fc7b0e6e7..7829a7e9c54 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_aos.c
@@ -852,11 +852,6 @@ lp_emit_instruction_aos(
       dst0 = emit_tex(bld, inst, LP_BLD_TEX_MODIFIER_LOD_BIAS);
       break;
 
-   case TGSI_OPCODE_NRM:
-      /* fall-through */
-   case TGSI_OPCODE_NRM4:
-      return FALSE;
-
    case TGSI_OPCODE_DIV:
       assert(0);
       return FALSE;
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
index 05618bc1e6e..76b9d69264f 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_soa.c
@@ -3507,99 +3507,6 @@ cont_emit(
    lp_exec_continue(&bld->exec_mask);
 }
 
-/* XXX: Refactor and move it to lp_bld_tgsi_action.c
- *
- * XXX: What do the comments about xmm registers mean?  Maybe they are left over
- * from old code, but there is no garauntee that LLVM will use those registers
- * for this code.
- *
- * XXX: There should be no calls to lp_build_emit_fetch in this function.  This
- * should be handled by the emit_data->fetch_args function. */
-static void
-nrm_emit(
-   const struct lp_build_tgsi_action * action,
-   struct lp_build_tgsi_context * bld_base,
-   struct lp_build_emit_data * emit_data)
-{
-   LLVMValueRef tmp0, tmp1;
-   LLVMValueRef tmp4 = NULL;
-   LLVMValueRef tmp5 = NULL;
-   LLVMValueRef tmp6 = NULL;
-   LLVMValueRef tmp7 = NULL;
-   struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base);
-
-   uint dims = (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_NRM) ? 3 : 4;
-
-  if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_X) ||
-      TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Y) ||
-      TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Z) ||
-      (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_W) && dims == 4)) {
-
-      /* NOTE: Cannot use xmm regs 2/3 here (see emit_rsqrt() above). */
-
-      /* xmm4 = src.x */
-      /* xmm0 = src.x * src.x */
-      tmp0 = lp_build_emit_fetch(&bld->bld_base, emit_data->inst, 0, TGSI_CHAN_X);
-      if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_X)) {
-         tmp4 = tmp0;
-      }
-      tmp0 = lp_build_mul( &bld->bld_base.base, tmp0, tmp0);
-
-      /* xmm5 = src.y */
-      /* xmm0 = xmm0 + src.y * src.y */
-      tmp1 = lp_build_emit_fetch(&bld->bld_base, emit_data->inst, 0, TGSI_CHAN_Y);
-      if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Y)) {
-         tmp5 = tmp1;
-      }
-      tmp1 = lp_build_mul( &bld->bld_base.base, tmp1, tmp1);
-      tmp0 = lp_build_add( &bld->bld_base.base, tmp0, tmp1);
-
-      /* xmm6 = src.z */
-      /* xmm0 = xmm0 + src.z * src.z */
-      tmp1 = lp_build_emit_fetch(&bld->bld_base, emit_data->inst, 0, TGSI_CHAN_Z);
-      if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Z)) {
-         tmp6 = tmp1;
-      }
-      tmp1 = lp_build_mul( &bld->bld_base.base, tmp1, tmp1);
-      tmp0 = lp_build_add( &bld->bld_base.base, tmp0, tmp1);
-
-      if (dims == 4) {
-         /* xmm7 = src.w */
-         /* xmm0 = xmm0 + src.w * src.w */
-         tmp1 = lp_build_emit_fetch(&bld->bld_base, emit_data->inst, 0, TGSI_CHAN_W);
-         if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_W)) {
-            tmp7 = tmp1;
-         }
-         tmp1 = lp_build_mul( &bld->bld_base.base, tmp1, tmp1);
-         tmp0 = lp_build_add( &bld->bld_base.base, tmp0, tmp1);
-      }
-      /* xmm1 = 1 / sqrt(xmm0) */
-      tmp1 = lp_build_rsqrt( &bld->bld_base.base, tmp0);
-       /* dst.x = xmm1 * src.x */
-      if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_X)) {
-         emit_data->output[TGSI_CHAN_X] = lp_build_mul( &bld->bld_base.base, tmp4, tmp1);
-      }
-      /* dst.y = xmm1 * src.y */
-      if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Y)) {
-         emit_data->output[TGSI_CHAN_Y] = lp_build_mul( &bld->bld_base.base, tmp5, tmp1);
-      }
-
-      /* dst.z = xmm1 * src.z */
-      if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_Z)) {
-         emit_data->output[TGSI_CHAN_Z] = lp_build_mul( &bld->bld_base.base, tmp6, tmp1);
-      }
-      /* dst.w = xmm1 * src.w */
-      if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_X) && dims == 4) {
-         emit_data->output[TGSI_CHAN_W] = lp_build_mul( &bld->bld_base.base, tmp7, tmp1);
-      }
-   }
-
-   /* dst.w = 1.0 */
-   if (TGSI_IS_DST0_CHANNEL_ENABLED(emit_data->inst, TGSI_CHAN_W) && dims == 3) {
-       emit_data->output[TGSI_CHAN_W] = bld->bld_base.base.one;
-   }
-}
-
 static void emit_prologue(struct lp_build_tgsi_context * bld_base)
 {
    struct lp_build_tgsi_soa_context * bld = lp_soa_context(bld_base);
@@ -3825,8 +3732,6 @@ lp_build_tgsi_soa(struct gallivm_state *gallivm,
    bld.bld_base.op_actions[TGSI_OPCODE_UIF].emit = uif_emit;
    bld.bld_base.op_actions[TGSI_OPCODE_KILL_IF].emit = kill_if_emit;
    bld.bld_base.op_actions[TGSI_OPCODE_KILL].emit = kill_emit;
-   bld.bld_base.op_actions[TGSI_OPCODE_NRM].emit = nrm_emit;
-   bld.bld_base.op_actions[TGSI_OPCODE_NRM4].emit = nrm_emit;
    bld.bld_base.op_actions[TGSI_OPCODE_RET].emit = ret_emit;
    bld.bld_base.op_actions[TGSI_OPCODE_SWITCH].emit = switch_emit;
    bld.bld_base.op_actions[TGSI_OPCODE_TEX].emit = tex_emit;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index 77948011ac7..b9a4c7bf88c 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -2773,70 +2773,6 @@ exec_dp2(struct tgsi_exec_machine *mach,
 }
 
 static void
-exec_nrm4(struct tgsi_exec_machine *mach,
-          const struct tgsi_full_instruction *inst)
-{
-   unsigned int chan;
-   union tgsi_exec_channel arg[4];
-   union tgsi_exec_channel scale;
-
-   fetch_source(mach, &arg[0], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
-   micro_mul(&scale, &arg[0], &arg[0]);
-
-   for (chan = TGSI_CHAN_Y; chan <= TGSI_CHAN_W; chan++) {
-      union tgsi_exec_channel product;
-
-      fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
-      micro_mul(&product, &arg[chan], &arg[chan]);
-      micro_add(&scale, &scale, &product);
-   }
-
-   micro_rsq(&scale, &scale);
-
-   for (chan = TGSI_CHAN_X; chan <= TGSI_CHAN_W; chan++) {
-      if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
-         micro_mul(&arg[chan], &arg[chan], &scale);
-         store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
-      }
-   }
-}
-
-static void
-exec_nrm3(struct tgsi_exec_machine *mach,
-          const struct tgsi_full_instruction *inst)
-{
-   if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XYZ) {
-      unsigned int chan;
-      union tgsi_exec_channel arg[3];
-      union tgsi_exec_channel scale;
-
-      fetch_source(mach, &arg[0], &inst->Src[0], TGSI_CHAN_X, TGSI_EXEC_DATA_FLOAT);
-      micro_mul(&scale, &arg[0], &arg[0]);
-
-      for (chan = TGSI_CHAN_Y; chan <= TGSI_CHAN_Z; chan++) {
-         union tgsi_exec_channel product;
-
-         fetch_source(mach, &arg[chan], &inst->Src[0], chan, TGSI_EXEC_DATA_FLOAT);
-         micro_mul(&product, &arg[chan], &arg[chan]);
-         micro_add(&scale, &scale, &product);
-      }
-
-      micro_rsq(&scale, &scale);
-
-      for (chan = TGSI_CHAN_X; chan <= TGSI_CHAN_Z; chan++) {
-         if (inst->Dst[0].Register.WriteMask & (1 << chan)) {
-            micro_mul(&arg[chan], &arg[chan], &scale);
-            store_dest(mach, &arg[chan], &inst->Dst[0], inst, chan, TGSI_EXEC_DATA_FLOAT);
-         }
-      }
-   }
-
-   if (inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_W) {
-      store_dest(mach, &OneVec, &inst->Dst[0], inst, TGSI_CHAN_W, TGSI_EXEC_DATA_FLOAT);
-   }
-}
-
-static void
 exec_scs(struct tgsi_exec_machine *mach,
          const struct tgsi_full_instruction *inst)
 {
@@ -4104,14 +4040,6 @@ exec_instruction(
       exec_scs(mach, inst);
       break;
 
-   case TGSI_OPCODE_NRM:
-      exec_nrm3(mach, inst);
-      break;
-
-   case TGSI_OPCODE_NRM4:
-      exec_nrm4(mach, inst);
-      break;
-
    case TGSI_OPCODE_DIV:
       exec_vector_binary(mach, inst, micro_div, TGSI_EXEC_DATA_FLOAT, TGSI_EXEC_DATA_FLOAT);
       break;
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c
index 74d186cfdf1..6336304d594 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -106,7 +106,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
    { 1, 3, 0, 0, 0, 0, COMP, "CMP", TGSI_OPCODE_CMP },
    { 1, 1, 0, 0, 0, 0, CHAN, "SCS", TGSI_OPCODE_SCS },
    { 1, 2, 1, 0, 0, 0, OTHR, "TXB", TGSI_OPCODE_TXB },
-   { 1, 1, 0, 0, 0, 0, COMP, "NRM", TGSI_OPCODE_NRM },
+   { 0, 1, 0, 0, 0, 1, NONE, "", 69 },      /* removed */
    { 1, 2, 0, 0, 0, 0, COMP, "DIV", TGSI_OPCODE_DIV },
    { 1, 2, 0, 0, 0, 0, REPL, "DP2", TGSI_OPCODE_DP2 },
    { 1, 2, 1, 0, 0, 0, OTHR, "TXL", TGSI_OPCODE_TXL },
@@ -149,7 +149,7 @@ static const struct tgsi_opcode_info opcode_info[TGSI_OPCODE_LAST] =
    { 1, 2, 0, 0, 0, 0, COMP, "FSGE", TGSI_OPCODE_FSGE },
    { 1, 2, 0, 0, 0, 0, COMP, "FSLT", TGSI_OPCODE_FSLT },
    { 1, 2, 0, 0, 0, 0, COMP, "FSNE", TGSI_OPCODE_FSNE },
-   { 1, 1, 0, 0, 0, 0, REPL, "NRM4", TGSI_OPCODE_NRM4 },
+   { 0, 1, 0, 0, 0, 1, NONE, "", 112 },      /* removed */
    { 0, 1, 0, 0, 0, 0, NONE, "CALLNZ", TGSI_OPCODE_CALLNZ },
    { 0, 1, 0, 0, 0, 0, NONE, "", 114 },     /* removed */
    { 0, 1, 0, 0, 0, 0, NONE, "BREAKC", TGSI_OPCODE_BREAKC },
diff --git a/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h b/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
index 4ca4f246e26..56a7a972c92 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
+++ b/src/gallium/auxiliary/tgsi/tgsi_opcode_tmp.h
@@ -122,7 +122,6 @@ OP11(SSG)
 OP13(CMP)
 OP11(SCS)
 OP12_TEX(TXB)
-OP11(NRM)
 OP12(DIV)
 OP12(DP2)
 OP12_TEX(TXL)
@@ -153,7 +152,6 @@ OP00(BGNSUB)
 OP00_LBL(ENDLOOP)
 OP00(ENDSUB)
 OP00(NOP)
-OP11(NRM4)
 OP01(CALLNZ)
 OP01(BREAKC)
 OP01(KILL_IF)
diff --git a/src/gallium/docs/source/tgsi.rst b/src/gallium/docs/source/tgsi.rst
index 2e0197172fa..49de4ca9172 100644
--- a/src/gallium/docs/source/tgsi.rst
+++ b/src/gallium/docs/source/tgsi.rst
@@ -834,40 +834,6 @@ This instruction replicates its result.
   dst = texture\_sample(unit, coord, bias)
 
 
-.. opcode:: NRM - 3-component Vector Normalise
-
-.. math::
-  
-  u = src.x \times src.x + src.y \times src.y + src.z \times src.z
-
-  v = \frac{1}{\sqrt{u}}
-
-  dst.x = src.x \times v
-
-  dst.y = src.y \times v
-
-  dst.z = src.z \times v
-
-  dst.w = 1
-
-
-.. opcode:: NRM4 - 4-component Vector Normalise
-
-.. math::
-  
-  u = src.x \times src.x + src.y \times src.y + src.z \times src.z + src.w \times src.w
-
-  v = \frac{1}{\sqrt{u}}
-
-  dst.x = src.x \times v
-
-  dst.y = src.y \times v
-
-  dst.z = src.z \times v
-
-  dst.w = src.w \times v
-
-
 .. opcode:: DIV - Divide
 
 .. math::
diff --git a/src/gallium/drivers/ilo/shader/toy_tgsi.c b/src/gallium/drivers/ilo/shader/toy_tgsi.c
index 1ba06061372..8cbb47ec264 100644
--- a/src/gallium/drivers/ilo/shader/toy_tgsi.c
+++ b/src/gallium/drivers/ilo/shader/toy_tgsi.c
@@ -705,24 +705,6 @@ aos_SCS(struct toy_compiler *tc,
 }
 
 static void
-aos_NRM(struct toy_compiler *tc,
-        const struct tgsi_full_instruction *tgsi_inst,
-        struct toy_dst *dst,
-        struct toy_src *src)
-{
-   struct toy_dst tmp = tc_alloc_tmp(tc);
-
-   assert(!"NRM untested");
-
-   tc_DP3(tc, tmp, src[0], src[0]);
-   tc_INV(tc, tmp, tsrc_from(tmp));
-   tc_MUL(tc, tdst_writemask(dst[0], TOY_WRITEMASK_XYZ),
-         src[0], tsrc_from(tmp));
-
-   tc_MOV(tc, tdst_writemask(dst[0], TOY_WRITEMASK_W), tsrc_imm_f(1.0f));
-}
-
-static void
 aos_DIV(struct toy_compiler *tc,
         const struct tgsi_full_instruction *tgsi_inst,
         struct toy_dst *dst,
@@ -803,21 +785,6 @@ aos_ENDLOOP(struct toy_compiler *tc,
 }
 
 static void
-aos_NRM4(struct toy_compiler *tc,
-         const struct tgsi_full_instruction *tgsi_inst,
-         struct toy_dst *dst,
-         struct toy_src *src)
-{
-   struct toy_dst tmp = tc_alloc_tmp(tc);
-
-   assert(!"NRM4 untested");
-
-   tc_DP4(tc, tmp, src[0], src[0]);
-   tc_INV(tc, tmp, tsrc_from(tmp));
-   tc_MUL(tc, dst[0], tsrc_swizzle1(src[0], TOY_SWIZZLE_X), tsrc_from(tmp));
-}
-
-static void
 aos_unsupported(struct toy_compiler *tc,
                 const struct tgsi_full_instruction *tgsi_inst,
                 struct toy_dst *dst,
@@ -897,7 +864,6 @@ static const toy_tgsi_translate aos_translate_table[TGSI_OPCODE_LAST] = {
    [TGSI_OPCODE_CMP]          = aos_compare,
    [TGSI_OPCODE_SCS]          = aos_SCS,
    [TGSI_OPCODE_TXB]          = aos_tex,
-   [TGSI_OPCODE_NRM]          = aos_NRM,
    [TGSI_OPCODE_DIV]          = aos_DIV,
    [TGSI_OPCODE_DP2]          = aos_simple,
    [TGSI_OPCODE_TXL]          = aos_tex,
@@ -933,7 +899,6 @@ static const toy_tgsi_translate aos_translate_table[TGSI_OPCODE_LAST] = {
    [TGSI_OPCODE_FSGE]         = aos_set_on_cond,
    [TGSI_OPCODE_FSLT]         = aos_set_on_cond,
    [TGSI_OPCODE_FSNE]         = aos_set_on_cond,
-   [TGSI_OPCODE_NRM4]         = aos_NRM4,
    [TGSI_OPCODE_CALLNZ]       = aos_unsupported,
    [TGSI_OPCODE_BREAKC]       = aos_unsupported,
    [TGSI_OPCODE_KILL_IF]      = aos_simple,
@@ -1369,58 +1334,6 @@ soa_SCS(struct toy_compiler *tc,
 }
 
 static void
-soa_NRM(struct toy_compiler *tc,
-        const struct tgsi_full_instruction *tgsi_inst,
-        struct toy_dst *dst_,
-        struct toy_src *src_)
-{
-   const struct toy_dst tmp = tc_alloc_tmp(tc);
-   struct toy_dst dst0[4];
-   struct toy_src src0[4];
-
-   assert(!"SoA NRM untested");
-
-   tdst_transpose(dst_[0], dst0);
-   tsrc_transpose(src_[0], src0);
-
-   tc_MUL(tc, tmp, src0[2], src0[2]);
-   tc_MAC(tc, tmp, src0[1], src0[1], tsrc_from(tmp));
-   tc_MAC(tc, tmp, src0[0], src0[0], tsrc_from(tmp));
-   tc_INV(tc, tmp, tsrc_from(tmp));
-
-   tc_MUL(tc, dst0[0], src0[0], tsrc_from(tmp));
-   tc_MUL(tc, dst0[1], src0[1], tsrc_from(tmp));
-   tc_MUL(tc, dst0[2], src0[2], tsrc_from(tmp));
-   tc_MOV(tc, dst0[3], tsrc_imm_f(1.0f));
-}
-
-static void
-soa_NRM4(struct toy_compiler *tc,
-         const struct tgsi_full_instruction *tgsi_inst,
-         struct toy_dst *dst_,
-         struct toy_src *src_)
-{
-   const struct toy_dst tmp = tc_alloc_tmp(tc);
-   struct toy_dst dst0[4];
-   struct toy_src src0[4];
-   int i;
-
-   assert(!"SoA NRM4 untested");
-
-   tdst_transpose(dst_[0], dst0);
-   tsrc_transpose(src_[0], src0);
-
-   tc_MUL(tc, tmp, src0[3], src0[3]);
-   tc_MAC(tc, tmp, src0[2], src0[2], tsrc_from(tmp));
-   tc_MAC(tc, tmp, src0[1], src0[1], tsrc_from(tmp));
-   tc_MAC(tc, tmp, src0[0], src0[0], tsrc_from(tmp));
-   tc_INV(tc, tmp, tsrc_from(tmp));
-
-   for (i = 0; i < 4; i++)
-      tc_MUL(tc, dst0[i], src0[0], tsrc_from(tmp));
-}
-
-static void
 soa_unsupported(struct toy_compiler *tc,
                 const struct tgsi_full_instruction *tgsi_inst,
                 struct toy_dst *dst_,
@@ -1502,7 +1415,6 @@ static const toy_tgsi_translate soa_translate_table[TGSI_OPCODE_LAST] = {
    [TGSI_OPCODE_CMP]          = soa_per_channel,
    [TGSI_OPCODE_SCS]          = soa_SCS,
    [TGSI_OPCODE_TXB]          = soa_passthrough,
-   [TGSI_OPCODE_NRM]          = soa_NRM,
    [TGSI_OPCODE_DIV]          = soa_per_channel,
    [TGSI_OPCODE_DP2]          = soa_dot_product,
    [TGSI_OPCODE_TXL]          = soa_passthrough,
@@ -1538,7 +1450,6 @@ static const toy_tgsi_translate soa_translate_table[TGSI_OPCODE_LAST] = {
    [TGSI_OPCODE_FSGE]         = soa_per_channel,
    [TGSI_OPCODE_FSLT]         = soa_per_channel,
    [TGSI_OPCODE_FSNE]         = soa_per_channel,
-   [TGSI_OPCODE_NRM4]         = soa_NRM4,
    [TGSI_OPCODE_CALLNZ]       = soa_unsupported,
    [TGSI_OPCODE_BREAKC]       = soa_unsupported,
    [TGSI_OPCODE_KILL_IF]          = soa_passthrough,
diff --git a/src/gallium/drivers/r300/r300_tgsi_to_rc.c b/src/gallium/drivers/r300/r300_tgsi_to_rc.c
index 7ea9cd23cf9..c08818eb19b 100644
--- a/src/gallium/drivers/r300/r300_tgsi_to_rc.c
+++ b/src/gallium/drivers/r300/r300_tgsi_to_rc.c
@@ -97,7 +97,6 @@ static unsigned translate_opcode(unsigned opcode)
         case TGSI_OPCODE_CMP: return RC_OPCODE_CMP;
         case TGSI_OPCODE_SCS: return RC_OPCODE_SCS;
         case TGSI_OPCODE_TXB: return RC_OPCODE_TXB;
-     /* case TGSI_OPCODE_NRM: return RC_OPCODE_NRM; */
      /* case TGSI_OPCODE_DIV: return RC_OPCODE_DIV; */
         case TGSI_OPCODE_DP2: return RC_OPCODE_DP2;
         case TGSI_OPCODE_TXL: return RC_OPCODE_TXL;
@@ -130,7 +129,6 @@ static unsigned translate_opcode(unsigned opcode)
      /* case TGSI_OPCODE_ENDLOOP2: return RC_OPCODE_ENDLOOP2; */
      /* case TGSI_OPCODE_ENDSUB: return RC_OPCODE_ENDSUB; */
         case TGSI_OPCODE_NOP: return RC_OPCODE_NOP;
-     /* case TGSI_OPCODE_NRM4: return RC_OPCODE_NRM4; */
      /* case TGSI_OPCODE_CALLNZ: return RC_OPCODE_CALLNZ; */
      /* case TGSI_OPCODE_BREAKC: return RC_OPCODE_BREAKC; */
         case TGSI_OPCODE_KILL_IF: return RC_OPCODE_KIL;
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 29d27ce821c..10a5ca0b1ae 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -7257,7 +7257,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_CMP,	0, ALU_OP0_NOP, tgsi_cmp},
 	{TGSI_OPCODE_SCS,	0, ALU_OP0_NOP, tgsi_scs},
 	{TGSI_OPCODE_TXB,	0, FETCH_OP_SAMPLE_LB, tgsi_tex},
-	{TGSI_OPCODE_NRM,	0, ALU_OP0_NOP, tgsi_unsupported},
+	{69,			0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DIV,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DP2,	0, ALU_OP2_DOT4, tgsi_dp},
 	{TGSI_OPCODE_TXL,	0, FETCH_OP_SAMPLE_L, tgsi_tex},
@@ -7300,7 +7300,7 @@ static struct r600_shader_tgsi_instruction r600_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_FSGE,	0, ALU_OP2_SETGE_DX10, tgsi_op2},
 	{TGSI_OPCODE_FSLT,	0, ALU_OP2_SETGT_DX10, tgsi_op2_swap},
 	{TGSI_OPCODE_FSNE,	0, ALU_OP2_SETNE_DX10, tgsi_op2_swap},
-	{TGSI_OPCODE_NRM4,	0, ALU_OP0_NOP, tgsi_unsupported},
+	{112,			0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_CALLNZ,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{114,			0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_BREAKC,	0, ALU_OP0_NOP, tgsi_loop_breakc},
@@ -7456,7 +7456,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_CMP,	0, ALU_OP0_NOP, tgsi_cmp},
 	{TGSI_OPCODE_SCS,	0, ALU_OP0_NOP, tgsi_scs},
 	{TGSI_OPCODE_TXB,	0, FETCH_OP_SAMPLE_LB, tgsi_tex},
-	{TGSI_OPCODE_NRM,	0, ALU_OP0_NOP, tgsi_unsupported},
+	{69,			0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DIV,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DP2,	0, ALU_OP2_DOT4, tgsi_dp},
 	{TGSI_OPCODE_TXL,	0, FETCH_OP_SAMPLE_L, tgsi_tex},
@@ -7499,7 +7499,7 @@ static struct r600_shader_tgsi_instruction eg_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_FSGE,	0, ALU_OP2_SETGE_DX10, tgsi_op2},
 	{TGSI_OPCODE_FSLT,	0, ALU_OP2_SETGT_DX10, tgsi_op2_swap},
 	{TGSI_OPCODE_FSNE,	0, ALU_OP2_SETNE_DX10, tgsi_op2_swap},
-	{TGSI_OPCODE_NRM4,	0, ALU_OP0_NOP, tgsi_unsupported},
+	{112,			0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_CALLNZ,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{114,			0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_BREAKC,	0, ALU_OP0_NOP, tgsi_unsupported},
@@ -7655,7 +7655,7 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_CMP,	0, ALU_OP0_NOP, tgsi_cmp},
 	{TGSI_OPCODE_SCS,	0, ALU_OP0_NOP, tgsi_scs},
 	{TGSI_OPCODE_TXB,	0, FETCH_OP_SAMPLE_LB, tgsi_tex},
-	{TGSI_OPCODE_NRM,	0, ALU_OP0_NOP, tgsi_unsupported},
+	{69,			0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DIV,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_DP2,	0, ALU_OP2_DOT4, tgsi_dp},
 	{TGSI_OPCODE_TXL,	0, FETCH_OP_SAMPLE_L, tgsi_tex},
@@ -7698,7 +7698,7 @@ static struct r600_shader_tgsi_instruction cm_shader_tgsi_instruction[] = {
 	{TGSI_OPCODE_FSGE,	0, ALU_OP2_SETGE_DX10, tgsi_op2},
 	{TGSI_OPCODE_FSLT,	0, ALU_OP2_SETGT_DX10, tgsi_op2_swap},
 	{TGSI_OPCODE_FSNE,	0, ALU_OP2_SETNE_DX10, tgsi_op2_swap},
-	{TGSI_OPCODE_NRM4,	0, ALU_OP0_NOP, tgsi_unsupported},
+	{112,			0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_CALLNZ,	0, ALU_OP0_NOP, tgsi_unsupported},
 	{114,			0, ALU_OP0_NOP, tgsi_unsupported},
 	{TGSI_OPCODE_BREAKC,	0, ALU_OP0_NOP, tgsi_unsupported},
diff --git a/src/gallium/drivers/svga/svga_tgsi_insn.c b/src/gallium/drivers/svga/svga_tgsi_insn.c
index b68b01a04ab..7a12b52e2dd 100644
--- a/src/gallium/drivers/svga/svga_tgsi_insn.c
+++ b/src/gallium/drivers/svga/svga_tgsi_insn.c
@@ -54,7 +54,6 @@ translate_opcode(uint opcode)
    case TGSI_OPCODE_MOV:        return SVGA3DOP_MOV;
    case TGSI_OPCODE_MUL:        return SVGA3DOP_MUL;
    case TGSI_OPCODE_NOP:        return SVGA3DOP_NOP;
-   case TGSI_OPCODE_NRM4:       return SVGA3DOP_NRM;
    default:
       assert(!"svga: unexpected opcode in translate_opcode()");
       return SVGA3DOP_LAST_INST;
@@ -1270,40 +1269,6 @@ emit_dph(struct svga_shader_emitter *emit,
 
 
 /**
- * Translate the following TGSI DST instruction.
- *    NRM  DST, SRC
- * To the following SVGA3D instruction sequence.
- *    DP3  TMP, SRC, SRC
- *    RSQ  TMP, TMP
- *    MUL  DST, SRC, TMP
- */
-static boolean
-emit_nrm(struct svga_shader_emitter *emit,
-         const struct tgsi_full_instruction *insn)
-{
-   SVGA3dShaderDestToken dst = translate_dst_register( emit, insn, 0 );
-   const struct src_register src0 =
-      translate_src_register(emit, &insn->Src[0]);
-   SVGA3dShaderDestToken temp = get_temp( emit );
-
-   /* DP3  TMP, SRC, SRC */
-   if (!submit_op2( emit, inst_token( SVGA3DOP_DP3 ), temp, src0, src0 ))
-      return FALSE;
-
-   /* RSQ  TMP, TMP */
-   if (!submit_op1( emit, inst_token( SVGA3DOP_RSQ ), temp, src( temp )))
-      return FALSE;
-
-   /* MUL  DST, SRC, TMP */
-   if (!submit_op2( emit, inst_token( SVGA3DOP_MUL ), dst,
-                    src0, src( temp )))
-      return FALSE;
-
-   return TRUE;
-}
-
-
-/**
  * Sine / Cosine helper function.
  */
 static boolean
@@ -2962,9 +2927,6 @@ svga_emit_instruction(struct svga_shader_emitter *emit,
    case TGSI_OPCODE_DPH:
       return emit_dph( emit, insn );
 
-   case TGSI_OPCODE_NRM:
-      return emit_nrm( emit, insn );
-
    case TGSI_OPCODE_COS:
       return emit_cos( emit, insn );
 
diff --git a/src/gallium/include/pipe/p_shader_tokens.h b/src/gallium/include/pipe/p_shader_tokens.h
index df154a27c8d..ba10576d77d 100644
--- a/src/gallium/include/pipe/p_shader_tokens.h
+++ b/src/gallium/include/pipe/p_shader_tokens.h
@@ -352,7 +352,7 @@ struct tgsi_property_data {
 #define TGSI_OPCODE_CMP                 66
 #define TGSI_OPCODE_SCS                 67
 #define TGSI_OPCODE_TXB                 68
-#define TGSI_OPCODE_NRM                 69
+                                /* gap */
 #define TGSI_OPCODE_DIV                 70
 #define TGSI_OPCODE_DP2                 71
 #define TGSI_OPCODE_TXL                 72
@@ -396,7 +396,7 @@ struct tgsi_property_data {
 #define TGSI_OPCODE_FSLT                110
 #define TGSI_OPCODE_FSNE                111
 
-#define TGSI_OPCODE_NRM4                112
+                                /* gap */
 #define TGSI_OPCODE_CALLNZ              113
                                 /* gap */
 #define TGSI_OPCODE_BREAKC              115