diff options
| author | Topi Pohjolainen <[email protected]> | 2014-02-12 14:16:59 +0200 |
|---|---|---|
| committer | Topi Pohjolainen <[email protected]> | 2014-03-05 10:19:19 +0200 |
| commit | afed5354aa7860483113722d2a810cccfa175474 (patch) | |
| tree | 5558f35866b646d891024fde35b38b8c6b087bd8 /src | |
| parent | 9b169a18939d1bde8db415a001b5c57259231546 (diff) | |
i965/wm: Use resolved miptree consistently in surface setup
Most of the logic refers to the local variable 'mt' directly but
a few cases use 'intelObj->mt' instead. These are the same for
now but will be different once stencil miptree gets used.
v2 (Ian): fixed also indentation in surrounding lines
Reviewed-by: Matt Turner <[email protected]>
Reviewed-by: Ian Romanick <[email protected]>
Signed-off-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 16 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/gen7_wm_surface_state.c | 10 |
2 files changed, 13 insertions, 13 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 303b5cb9662..a0bb4bafaa3 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -319,28 +319,28 @@ brw_update_texture_surface(struct gl_context *ctx, BRW_SURFACE_CUBEFACE_ENABLES | tex_format << BRW_SURFACE_FORMAT_SHIFT); - surf[1] = intelObj->mt->region->bo->offset64 + intelObj->mt->offset; /* reloc */ + surf[1] = mt->region->bo->offset64 + mt->offset; /* reloc */ surf[2] = ((intelObj->_MaxLevel - tObj->BaseLevel) << BRW_SURFACE_LOD_SHIFT | (mt->logical_width0 - 1) << BRW_SURFACE_WIDTH_SHIFT | (mt->logical_height0 - 1) << BRW_SURFACE_HEIGHT_SHIFT); - surf[3] = (brw_get_surface_tiling_bits(intelObj->mt->region->tiling) | + surf[3] = (brw_get_surface_tiling_bits(mt->region->tiling) | (mt->logical_depth0 - 1) << BRW_SURFACE_DEPTH_SHIFT | - (intelObj->mt->region->pitch - 1) << + (mt->region->pitch - 1) << BRW_SURFACE_PITCH_SHIFT); - surf[4] = (brw_get_surface_num_multisamples(intelObj->mt->num_samples) | + surf[4] = (brw_get_surface_num_multisamples(mt->num_samples) | SET_FIELD(tObj->BaseLevel - mt->first_level, BRW_SURFACE_MIN_LOD)); surf[5] = mt->align_h == 4 ? BRW_SURFACE_VERTICAL_ALIGN_ENABLE : 0; /* Emit relocation to surface contents */ drm_intel_bo_emit_reloc(brw->batch.bo, - *surf_offset + 4, - intelObj->mt->region->bo, - surf[1] - intelObj->mt->region->bo->offset64, - I915_GEM_DOMAIN_SAMPLER, 0); + *surf_offset + 4, + mt->region->bo, + surf[1] - mt->region->bo->offset64, + I915_GEM_DOMAIN_SAMPLER, 0); } /** diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index 154a0fdd83c..b9d6c8b33fe 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -318,7 +318,7 @@ gen7_update_texture_surface(struct gl_context *ctx, surf[2] = SET_FIELD(mt->logical_width0 - 1, GEN7_SURFACE_WIDTH) | SET_FIELD(mt->logical_height0 - 1, GEN7_SURFACE_HEIGHT); surf[3] = SET_FIELD(mt->logical_depth0 - 1, BRW_SURFACE_DEPTH) | - ((intelObj->mt->region->pitch) - 1); + (mt->region->pitch - 1); surf[4] = gen7_surface_msaa_bits(mt->num_samples, mt->msaa_layout); @@ -356,10 +356,10 @@ gen7_update_texture_surface(struct gl_context *ctx, /* Emit relocation to surface contents */ drm_intel_bo_emit_reloc(brw->batch.bo, - *surf_offset + 4, - intelObj->mt->region->bo, - surf[1] - intelObj->mt->region->bo->offset64, - I915_GEM_DOMAIN_SAMPLER, 0); + *surf_offset + 4, + mt->region->bo, + surf[1] - mt->region->bo->offset64, + I915_GEM_DOMAIN_SAMPLER, 0); gen7_check_surface_setup(surf, false /* is_render_target */); } |