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authorConnor Abbott <[email protected]>2020-07-16 15:47:27 +0200
committerMarge Bot <[email protected]>2020-07-16 20:49:20 +0000
commitaeca92ed7984baed231297bd72d725ecd989ffa2 (patch)
tree7cc3cb0b0194016e9719c900cc940f4e431d176b /src
parent981608ad04ce36dec6d1b551cd5bc550b4ca5cb8 (diff)
ir3: Handle gl_FragStencilRefARB
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5936>
Diffstat (limited to 'src')
-rw-r--r--src/freedreno/ir3/ir3_compiler_nir.c3
-rw-r--r--src/freedreno/ir3/ir3_shader.h2
2 files changed, 4 insertions, 1 deletions
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 2a5db029872..acfe4341ccd 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -3209,6 +3209,9 @@ setup_output(struct ir3_context *ctx, nir_variable *out)
case FRAG_RESULT_SAMPLE_MASK:
so->writes_smask = true;
break;
+ case FRAG_RESULT_STENCIL:
+ so->writes_stencilref = true;
+ break;
default:
slot += out->data.index; /* For dual-src blend */
if (slot >= FRAG_RESULT_DATA0)
diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h
index f5810847112..f5a73bb2e00 100644
--- a/src/freedreno/ir3/ir3_shader.h
+++ b/src/freedreno/ir3/ir3_shader.h
@@ -564,7 +564,7 @@ struct ir3_shader_variant {
uint8_t regid;
bool half : 1;
} outputs[32 + 2]; /* +POSITION +PSIZE */
- bool writes_pos, writes_smask, writes_psize;
+ bool writes_pos, writes_smask, writes_psize, writes_stencilref;
/* Size in dwords of all outputs for VS, size of entire patch for HS. */
uint32_t output_size;