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authorSagar Ghuge <[email protected]>2019-03-25 21:17:08 -0700
committerMatt Turner <[email protected]>2019-05-07 14:33:48 -0700
commit9db616e8a2e86354a3ba9851d84911f7cc623f9b (patch)
tree388a2974307c58a7730c26dd18a4d7043d1e638a /src
parent5211159b5b469409ac9c6d8b52535c5bb544c508 (diff)
intel/compiler: Replicate 16 bit immediate value correctly
For the W or UW (signed or unsigned word) source types, the 16-bit value must be replicated in both the low and high words of the 32-bit immediate value. v2: Fix replication in other places as well V3: fix a few nits (Matt Turner) Signed-off-by: Sagar Ghuge <[email protected]> Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/intel/compiler/brw_fs.cpp3
-rw-r--r--src/intel/compiler/brw_vec4_generator.cpp3
2 files changed, 6 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 335eaa0e934..66ee7605bea 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -4076,6 +4076,9 @@ fs_visitor::lower_integer_multiplication()
mul->src[1].type = BRW_REGISTER_TYPE_UW;
mul->src[1].stride *= 2;
+ if (mul->src[1].file == IMM) {
+ mul->src[1] = brw_imm_uw(mul->src[1].ud);
+ }
} else if (devinfo->gen == 7 && !devinfo->is_haswell &&
inst->group > 0) {
/* Among other things the quarter control bits influence which
diff --git a/src/intel/compiler/brw_vec4_generator.cpp b/src/intel/compiler/brw_vec4_generator.cpp
index 05e6f50ebb6..b6d2a0aba80 100644
--- a/src/intel/compiler/brw_vec4_generator.cpp
+++ b/src/intel/compiler/brw_vec4_generator.cpp
@@ -443,6 +443,9 @@ generate_gs_set_write_offset(struct brw_codegen *p,
brw_MOV(p, suboffset(stride(dst, 2, 2, 1), 3),
brw_imm_ud(src0.ud * src1.ud));
} else {
+ if (src1.file == BRW_IMMEDIATE_VALUE) {
+ src1 = brw_imm_uw(src1.ud);
+ }
brw_MUL(p, suboffset(stride(dst, 2, 2, 1), 3), stride(src0, 8, 2, 4),
retype(src1, BRW_REGISTER_TYPE_UW));
}