diff options
author | Jason Ekstrand <[email protected]> | 2020-01-07 13:20:10 -0600 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2020-01-07 21:52:19 -0600 |
commit | 803fad43c3f9a89f0d8409bd33280b5457b104c7 (patch) | |
tree | 62077f6bc36daa0a842271ff57a1774bcd3edd23 /src | |
parent | 7cc0702bbb955010600fcb2685edb4ba703561a8 (diff) |
intel/nir: Add a memory barrier before barrier()
Our barrier instruction does not implicitly do a memory fence but the
GLSL barrier() intrinsic is supposed to. The easiest back-portable
solution is to just add the NIR barriers. We'll sort this out more
properly in later commits.
Cc: [email protected]
Closes: #2138
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/intel/compiler/brw_nir_lower_cs_intrinsics.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c index 434ad005281..3f48a3c5dda 100644 --- a/src/intel/compiler/brw_nir_lower_cs_intrinsics.c +++ b/src/intel/compiler/brw_nir_lower_cs_intrinsics.c @@ -55,6 +55,20 @@ lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state, nir_ssa_def *sysval; switch (intrinsic->intrinsic) { + case nir_intrinsic_barrier: { + /* Our HW barrier instruction doesn't do a memory barrier for us but + * the GLSL barrier() intrinsic does for shared memory. Insert a + * shared memory barrier before every barrier(). + */ + b->cursor = nir_before_instr(&intrinsic->instr); + + nir_intrinsic_instr *shared_barrier = + nir_intrinsic_instr_create(b->shader, + nir_intrinsic_memory_barrier_shared); + nir_builder_instr_insert(b, &shared_barrier->instr); + continue; + } + case nir_intrinsic_load_local_invocation_index: case nir_intrinsic_load_local_invocation_id: { /* First time we are using those, so let's calculate them. */ |