diff options
| author | Iago Toral Quiroga <[email protected]> | 2016-02-15 10:07:42 +0100 |
|---|---|---|
| committer | Samuel Iglesias Gonsálvez <[email protected]> | 2017-01-03 11:26:50 +0100 |
| commit | 619271ec8785ab8b6021d0f49e98c51d457eab4d (patch) | |
| tree | 880c9631c3550a207f94a902acf68e818a8cc384 /src | |
| parent | 21cf6f14d5abdf7d0f9641404387e0c00de6f56f (diff) | |
i965/vec4: fix register allocation for 64-bit undef sources
Reviewed-by: Francisco Jerez <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp index 67b6b32cfde..3611f8c7323 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp @@ -2080,7 +2080,8 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr) void vec4_visitor::nir_emit_undef(nir_ssa_undef_instr *instr) { - nir_ssa_values[instr->def.index] = dst_reg(VGRF, alloc.allocate(1)); + nir_ssa_values[instr->def.index] = + dst_reg(VGRF, alloc.allocate(DIV_ROUND_UP(instr->def.bit_size, 32))); } } |