diff options
| author | Eric Anholt <[email protected]> | 2020-03-17 16:03:11 -0700 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-03-19 21:35:49 +0000 |
| commit | 5b57aa79e2bd244079639bcc696251ce0f7af7c7 (patch) | |
| tree | 972a29ec94f0186607a7349d511ad7c525487752 /src | |
| parent | 5c8ba96a54feaf9bb783bb165bce91ee0c3253f9 (diff) | |
freedreno: Switch to exposing only half-integer pixel centers.
This is what the HW provides us. If we need integer pixel centers, we
want the state tracker to do the lowering pass so that it gets to optimize
on the subtract. This is also the shader instructions that the blob is
doing on GLES, and is what Vulkan wants too, as was noted in MR !4172.
shader-db on a630:
total instructions in shared programs: 186689 -> 186168 (-0.28%)
total nops in shared programs: 66253 -> 66139 (-0.17%)
total non-nops in shared programs: 120436 -> 120029 (-0.34%)
total dwords in shared programs: 292192 -> 291168 (-0.35%)
total last-baryf in shared programs: 4810 -> 4734 (-1.58%)
total full in shared programs: 10176 -> 10195 (0.19%)
total constlen in shared programs: 54589 -> 54575 (-0.03%)
total sstall in shared programs: 24582 -> 24802 (0.89%)
total (ss) in shared programs: 3921 -> 3925 (0.10%)
total (sy) in shared programs: 1934 -> 1923 (-0.57%)
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4223>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4223>
Diffstat (limited to 'src')
| -rw-r--r-- | src/freedreno/ir3/ir3_compiler_nir.c | 5 | ||||
| -rw-r--r-- | src/gallium/drivers/freedreno/freedreno_screen.c | 6 |
2 files changed, 6 insertions, 5 deletions
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c index 01f0985da62..75f949522f5 100644 --- a/src/freedreno/ir3/ir3_compiler_nir.c +++ b/src/freedreno/ir3/ir3_compiler_nir.c @@ -1319,11 +1319,8 @@ get_frag_coord(struct ir3_context *ctx) * */ for (int i = 0; i < 2; i++) { - xyzw[i] = ir3_SUB_S(b, xyzw[i], 0, - create_immed(b, 8), 0); - xyzw[i] = ir3_SHR_B(b, xyzw[i], 0, - create_immed(b, 4), 0); xyzw[i] = ir3_COV(b, xyzw[i], TYPE_U32, TYPE_F32); + xyzw[i] = ir3_MUL_F(b, xyzw[i], 0, create_immed(b, fui(1.0 / 16.0)), 0); } ctx->frag_coord = ir3_create_collect(ctx, xyzw, 4); diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c index bb8711f34d2..e6bfa49c4a8 100644 --- a/src/gallium/drivers/freedreno/freedreno_screen.c +++ b/src/gallium/drivers/freedreno/freedreno_screen.c @@ -187,7 +187,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TEXTURE_SWIZZLE: case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: - case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: case PIPE_CAP_SEAMLESS_CUBE_MAP: case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: @@ -202,6 +201,11 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND: return 1; + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: + return is_a2xx(screen); + case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: + return !is_a2xx(screen); + case PIPE_CAP_PACKED_UNIFORMS: return !is_a2xx(screen); |