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authorRhys Perry <[email protected]>2020-07-02 13:38:18 +0100
committerMarge Bot <[email protected]>2020-07-17 16:40:47 +0000
commit56d9bcdded8f3eb7bd45262ce013ef1809d8edb1 (patch)
tree392a417cf6969a5778ce1d4971c1f8de61ac2665 /src
parent23631ddd4db192033cba1a2e3f3024f18651867f (diff)
radv: enable more float_controls features
Signed-off-by: Rhys Perry <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5773>
Diffstat (limited to 'src')
-rw-r--r--src/amd/vulkan/radv_device.c21
1 files changed, 10 insertions, 11 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 80c87fb8319..18767a30033 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -1557,30 +1557,29 @@ radv_get_physical_device_properties_1_2(struct radv_physical_device *pdevice,
p->roundingModeIndependence = VK_SHADER_FLOAT_CONTROLS_INDEPENDENCE_ALL_KHR;
}
- /* Do not allow both preserving and flushing denorms because different
- * shaders in the same pipeline can have different settings and this
- * won't work for merged shaders. To make it work, this requires LLVM
+ /* With LLVM, do not allow both preserving and flushing denorms because
+ * different shaders in the same pipeline can have different settings and
+ * this won't work for merged shaders. To make it work, this requires LLVM
* support for changing the register. The same logic applies for the
* rounding modes because they are configured with the same config
- * register. TODO: we can enable a lot of these for ACO when it
- * supports all stages.
+ * register.
*/
p->shaderDenormFlushToZeroFloat32 = true;
- p->shaderDenormPreserveFloat32 = false;
+ p->shaderDenormPreserveFloat32 = !pdevice->use_llvm;
p->shaderRoundingModeRTEFloat32 = true;
- p->shaderRoundingModeRTZFloat32 = false;
+ p->shaderRoundingModeRTZFloat32 = !pdevice->use_llvm;
p->shaderSignedZeroInfNanPreserveFloat32 = true;
- p->shaderDenormFlushToZeroFloat16 = false;
+ p->shaderDenormFlushToZeroFloat16 = pdevice->rad_info.has_packed_math_16bit && !pdevice->use_llvm;
p->shaderDenormPreserveFloat16 = pdevice->rad_info.has_packed_math_16bit;
p->shaderRoundingModeRTEFloat16 = pdevice->rad_info.has_packed_math_16bit;
- p->shaderRoundingModeRTZFloat16 = false;
+ p->shaderRoundingModeRTZFloat16 = pdevice->rad_info.has_packed_math_16bit && !pdevice->use_llvm;
p->shaderSignedZeroInfNanPreserveFloat16 = pdevice->rad_info.has_packed_math_16bit;
- p->shaderDenormFlushToZeroFloat64 = false;
+ p->shaderDenormFlushToZeroFloat64 = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_llvm;
p->shaderDenormPreserveFloat64 = pdevice->rad_info.chip_class >= GFX8;
p->shaderRoundingModeRTEFloat64 = pdevice->rad_info.chip_class >= GFX8;
- p->shaderRoundingModeRTZFloat64 = false;
+ p->shaderRoundingModeRTZFloat64 = pdevice->rad_info.chip_class >= GFX8 && !pdevice->use_llvm;
p->shaderSignedZeroInfNanPreserveFloat64 = pdevice->rad_info.chip_class >= GFX8;
p->maxUpdateAfterBindDescriptorsInAllPools = UINT32_MAX / 64;