diff options
| author | Samuel Pitoiset <[email protected]> | 2019-10-02 19:34:52 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-10-02 19:40:39 +0200 |
| commit | 43041627445540afda1a05d11861935963660344 (patch) | |
| tree | 9b05f391ca0bd6bf1601148ddf35f0146352ebb9 /src | |
| parent | b8fe6189a97922d1bc0f3ee70125a1200c61c9ea (diff) | |
Revert "radv: disable viewport clamping even if FS doesn't write Z"
This was actually the wrong fix.
This reverts commit 0a313cc285c2939de9cac07f045b0b699bc208ca.
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/vulkan/radv_pipeline.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index cc30cb445e4..0d14ba2eda6 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -3395,6 +3395,7 @@ radv_pipeline_generate_depth_stencil_state(struct radeon_cmdbuf *ctx_cs, const VkPipelineDepthStencilStateCreateInfo *vkds = pCreateInfo->pDepthStencilState; RADV_FROM_HANDLE(radv_render_pass, pass, pCreateInfo->renderPass); struct radv_subpass *subpass = pass->subpasses + pCreateInfo->subpass; + struct radv_shader_variant *ps = pipeline->shaders[MESA_SHADER_FRAGMENT]; struct radv_render_pass_attachment *attachment = NULL; uint32_t db_depth_control = 0, db_stencil_control = 0; uint32_t db_render_control = 0, db_render_override2 = 0; @@ -3443,7 +3444,8 @@ radv_pipeline_generate_depth_stencil_state(struct radeon_cmdbuf *ctx_cs, db_render_override |= S_02800C_FORCE_HIS_ENABLE0(V_02800C_FORCE_DISABLE) | S_02800C_FORCE_HIS_ENABLE1(V_02800C_FORCE_DISABLE); - if (!pCreateInfo->pRasterizationState->depthClampEnable) { + if (!pCreateInfo->pRasterizationState->depthClampEnable && + ps->info.info.ps.writes_z) { /* From VK_EXT_depth_range_unrestricted spec: * * "The behavior described in Primitive Clipping still applies. |