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authorEric Anholt <[email protected]>2010-10-01 10:49:01 -0700
committerEric Anholt <[email protected]>2010-10-01 12:19:21 -0700
commit354c40a62411262d1223f439fdaf2176ca9adbe9 (patch)
treef956d41a72d9331f7ed7fb93eb5d1240e3d1aa73 /src
parentefc4a6f7909dbf554ee440210233c4b0f89ac89e (diff)
i965: Fix the gen6 jump size for BREAK/CONT in new FS.
Since gen5, jumps are in increments of 64 bits instead of increments of 128-bit instructions.
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 864c0b91e5b..1968e7fde0e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -2518,7 +2518,7 @@ fs_visitor::generate_code()
struct brw_instruction *inst0, *inst1;
GLuint br = 1;
- if (intel->gen == 5)
+ if (intel->gen >= 5)
br = 2;
assert(loop_stack_depth > 0);