diff options
| author | Rhys Perry <[email protected]> | 2020-03-16 17:11:16 +0000 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-03-16 19:34:32 +0000 |
| commit | 2d14a8f23721cba2f66ddecbece09a024dc1b45a (patch) | |
| tree | 6c77f31f0abfdb0c201bc8caad5e81762da2d749 /src | |
| parent | ded7a8bb4625b28add06f8550526f2169045e87c (diff) | |
aco: fix operand order for LS VGPR init bug workaround
Fixes: a952bf3946 ('aco: Fix LS VGPR init bug on affected hardware.')
Signed-off-by: Rhys Perry <[email protected]>
Reviewed-By: Timur Kristóf <[email protected]>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4201>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4201>
Diffstat (limited to 'src')
| -rw-r--r-- | src/amd/compiler/aco_instruction_selection.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index ff39ad854cd..29d40d18b25 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -9502,16 +9502,16 @@ void fix_ls_vgpr_init_bug(isel_context *ctx, Pseudo_instruction *startpgm) /* If there are no HS threads, SPI mistakenly loads the LS VGPRs starting at VGPR 0. */ Temp instance_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), - get_arg(ctx, ctx->args->ac.instance_id), get_arg(ctx, ctx->args->rel_auto_id), + get_arg(ctx, ctx->args->ac.instance_id), ls_has_nonzero_hs_threads); Temp rel_auto_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), - get_arg(ctx, ctx->args->rel_auto_id), get_arg(ctx, ctx->args->ac.tcs_rel_ids), + get_arg(ctx, ctx->args->rel_auto_id), ls_has_nonzero_hs_threads); Temp vertex_id = bld.vop2(aco_opcode::v_cndmask_b32, bld.def(v1), - get_arg(ctx, ctx->args->ac.vertex_id), get_arg(ctx, ctx->args->ac.tcs_patch_id), + get_arg(ctx, ctx->args->ac.vertex_id), ls_has_nonzero_hs_threads); ctx->arg_temps[ctx->args->ac.instance_id.arg_index] = instance_id; |