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authorEric Anholt <[email protected]>2010-01-25 14:48:06 -0800
committerEric Anholt <[email protected]>2010-02-25 10:53:08 -0800
commit2ab3bf2fa37042386a2d50f60b1d0e32e26b91c2 (patch)
treea8baae0ff43a773005bcd88376192d3791d8b30a /src
parent1489f108f4a9b53b42d3d4123da64ccdb7aafdde (diff)
i965: Re-disable the VS.
There's stuff that needs to happen in the ISA before we can play with actually executing anything in the VS.
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h2
-rw-r--r--src/mesa/drivers/dri/i965/gen6_vs_state.c3
2 files changed, 2 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index be32a8fa828..50c4d6d0a46 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -796,7 +796,7 @@
# define GEN6_VE0_INDEX_SHIFT 26
# define BRW_VE0_FORMAT_SHIFT 16
# define BRW_VE0_VALID (1 << 26)
-# define GEN6_VE0_VALID (1 << 25)
+# define GEN6_VE0_VALID (0 << 25)
# define BRW_VE0_SRC_OFFSET_SHIFT 0
# define BRW_VE1_COMPONENT_NOSTORE 0
# define BRW_VE1_COMPONENT_STORE_SRC 1
diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c
index 0299dc6768c..ba00e4e1fb6 100644
--- a/src/mesa/drivers/dri/i965/gen6_vs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c
@@ -56,8 +56,7 @@ upload_vs_state(struct brw_context *brw)
(brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
(0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
OUT_BATCH((0 << GEN6_VS_MAX_THREADS_SHIFT) |
- GEN6_VS_STATISTICS_ENABLE|
- GEN6_VS_ENABLE);
+ GEN6_VS_STATISTICS_ENABLE);
ADVANCE_BATCH();
intel_batchbuffer_emit_mi_flush(intel->batch);