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authorEric Anholt <[email protected]>2012-10-03 13:01:23 -0700
committerEric Anholt <[email protected]>2012-10-17 12:24:00 -0700
commit24aeeb2fdcde7a0c257db6469c6b0f064d53d3cf (patch)
treee4360b0365f2329f1858a1a951211b1925361916 /src
parent338fd85e624883996bf9072ca710f2d04e3c59dd (diff)
i965: Make the FS and VS share a few visitor/instruction fields.
This will let us reuse brw_fs_cfg.cpp from brw_vec4_*. Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp1
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.h14
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_visitor.cpp1
-rw-r--r--src/mesa/drivers/dri/i965/brw_shader.h25
-rw-r--r--src/mesa/drivers/dri/i965/brw_vec4.h13
5 files changed, 30 insertions, 24 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index fa8cf89c2ec..42393106c72 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -45,7 +45,6 @@ extern "C" {
#include "brw_eu.h"
#include "brw_wm.h"
}
-#include "brw_shader.h"
#include "brw_fs.h"
#include "glsl/glsl_types.h"
#include "glsl/ir_print_visitor.h"
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h
index 2d923576543..bfbcad676d2 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -45,6 +45,7 @@ extern "C" {
#include "brw_context.h"
#include "brw_eu.h"
#include "brw_wm.h"
+#include "brw_shader.h"
}
#include "glsl/glsl_types.h"
#include "glsl/ir.h"
@@ -124,7 +125,7 @@ static const fs_reg reg_undef;
static const fs_reg reg_null_f(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_F);
static const fs_reg reg_null_d(ARF, BRW_ARF_NULL, BRW_REGISTER_TYPE_D);
-class fs_inst : public exec_node {
+class fs_inst : public backend_instruction {
public:
/* Callers of this ralloc-based new need not call delete. It's
* easier to just ralloc_free 'ctx' (or any of its ancestors). */
@@ -154,7 +155,6 @@ public:
bool is_tex();
bool is_math();
- enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
fs_reg dst;
fs_reg src[3];
bool saturate;
@@ -182,7 +182,7 @@ public:
/** @} */
};
-class fs_visitor : public ir_visitor
+class fs_visitor : public backend_visitor
{
public:
@@ -363,16 +363,8 @@ public:
void setup_builtin_uniform_values(ir_variable *ir);
int implied_mrf_writes(fs_inst *inst);
- struct brw_context *brw;
const struct gl_fragment_program *fp;
- struct intel_context *intel;
- struct gl_context *ctx;
struct brw_wm_compile *c;
- struct brw_compile *p;
- struct brw_shader *shader;
- struct gl_shader_program *prog;
- void *mem_ctx;
- exec_list instructions;
/* Delayed setup of c->prog_data.params[] due to realloc of
* ParamValues[] during compile.
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 4603035792d..e5f28b6aded 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -44,7 +44,6 @@ extern "C" {
#include "brw_eu.h"
#include "brw_wm.h"
}
-#include "brw_shader.h"
#include "brw_fs.h"
#include "glsl/glsl_types.h"
#include "glsl/ir_optimization.h"
diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 3e6f579e37d..da2b7387f81 100644
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -27,6 +27,31 @@
#pragma once
+class backend_instruction : public exec_node {
+public:
+ enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
+};
+
+class backend_visitor : public ir_visitor {
+public:
+
+ struct brw_context *brw;
+ struct intel_context *intel;
+ struct gl_context *ctx;
+ struct brw_compile *p;
+ struct brw_shader *shader;
+ struct gl_shader_program *prog;
+
+ /** ralloc context for temporary data used during compile */
+ void *mem_ctx;
+
+ /**
+ * List of either fs_inst or vec4_instruction (inheriting from
+ * backend_instruction)
+ */
+ exec_list instructions;
+};
+
int brw_type_for_base_type(const struct glsl_type *type);
uint32_t brw_conditional_for_comparison(unsigned int op);
uint32_t brw_math_function(enum opcode op);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h
index a647215b7ec..8ab8431af53 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -144,7 +144,7 @@ public:
src_reg *reladdr;
};
-class vec4_instruction : public exec_node {
+class vec4_instruction : public backend_instruction {
public:
/* Callers of this ralloc-based new need not call delete. It's
* easier to just ralloc_free 'ctx' (or any of its ancestors). */
@@ -167,7 +167,6 @@ public:
struct brw_reg get_dst(void);
struct brw_reg get_src(int i);
- enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */
dst_reg dst;
src_reg src[3];
@@ -198,7 +197,7 @@ public:
bool is_math();
};
-class vec4_visitor : public ir_visitor
+class vec4_visitor : public backend_visitor
{
public:
vec4_visitor(struct brw_vs_compile *c,
@@ -215,17 +214,9 @@ public:
return dst_reg(retype(brw_null_reg(), BRW_REGISTER_TYPE_D));
}
- struct brw_context *brw;
const struct gl_vertex_program *vp;
- struct intel_context *intel;
- struct gl_context *ctx;
struct brw_vs_compile *c;
struct brw_vs_prog_data *prog_data;
- struct brw_compile *p;
- struct brw_shader *shader;
- struct gl_shader_program *prog;
- void *mem_ctx;
- exec_list instructions;
char *fail_msg;
bool failed;