diff options
author | Alyssa Rosenzweig <[email protected]> | 2019-07-02 06:05:18 -0700 |
---|---|---|
committer | Alyssa Rosenzweig <[email protected]> | 2019-07-10 06:12:05 -0700 |
commit | 0cfa54801e6beac8bd1f1e7152cc02af6a636ea0 (patch) | |
tree | 1269898aa634014a1f47fee45bb2e7c66d9c2c28 /src | |
parent | b113be7683afec96426575496d76ae3beb03a5e1 (diff) |
panfrost/midgard: Remove opt_copy_prop_tex
Eventually this should be replaced by proper tex RA / not emitting so
many silly moves to begin with / better general copy prop. For now
remove it since it breaks things.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/panfrost/midgard/midgard_compile.c | 50 |
1 files changed, 0 insertions, 50 deletions
diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c index b7498d43501..34b0678cf98 100644 --- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c +++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c @@ -2225,55 +2225,6 @@ midgard_opt_pos_propagate(compiler_context *ctx, midgard_block *block) return progress; } -static bool -midgard_opt_copy_prop_tex(compiler_context *ctx, midgard_block *block) -{ - bool progress = false; - - mir_foreach_instr_in_block_safe(block, ins) { - if (ins->type != TAG_ALU_4) continue; - if (!OP_IS_MOVE(ins->alu.op)) continue; - - unsigned from = ins->ssa_args.src1; - unsigned to = ins->ssa_args.dest; - - /* Make sure it's simple enough for us to handle */ - - if (from >= SSA_FIXED_MINIMUM) continue; - if (from >= ctx->func->impl->ssa_alloc) continue; - if (to < SSA_FIXED_REGISTER(REGISTER_TEXTURE_BASE)) continue; - if (to > SSA_FIXED_REGISTER(REGISTER_TEXTURE_BASE + 1)) continue; - - bool eliminated = false; - - mir_foreach_instr_in_block_from_rev(block, v, mir_prev_op(ins)) { - /* The texture registers are not SSA so be careful. - * Conservatively, just stop if we hit a texture op - * (even if it may not write) to where we are */ - - if (v->type != TAG_ALU_4) - break; - - if (v->ssa_args.dest == from) { - /* We don't want to track partial writes ... */ - if (v->mask == 0xF) { - v->ssa_args.dest = to; - eliminated = true; - } - - break; - } - } - - if (eliminated) - mir_remove_instruction(ins); - - progress |= eliminated; - } - - return progress; -} - /* The following passes reorder MIR instructions to enable better scheduling */ static void @@ -2699,7 +2650,6 @@ midgard_compile_shader_nir(nir_shader *nir, midgard_program *program, bool is_bl mir_foreach_block(ctx, block) { progress |= midgard_opt_pos_propagate(ctx, block); progress |= midgard_opt_copy_prop(ctx, block); - progress |= midgard_opt_copy_prop_tex(ctx, block); progress |= midgard_opt_dead_code_eliminate(ctx, block); } } while (progress); |