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authorMarek Olšák <[email protected]>2019-06-03 18:11:27 -0400
committerMarek Olšák <[email protected]>2019-06-11 20:05:21 -0400
commite5fe38484af6f1084578357de5307b9d7c359086 (patch)
tree745bef0d9b667bacddd44c57aff2f719d30990a1 /src
parent9c81db8adb1bb33db618e9d4160da263583d5fe3 (diff)
radeonsi: fixes for vec3 buffer stores in LLVM 9
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.c13
1 files changed, 10 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index e044e180778..3610ec90a89 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2628,7 +2628,12 @@ static void emit_streamout_output(struct si_shader_context *ctx,
vdata = out[0];
break;
case 2: /* as v2i32 */
- case 3: /* as v4i32 (aligned to 4) */
+ case 3: /* as v3i32 */
+ if (ac_has_vec3_support(ctx->screen->info.chip_class, false)) {
+ vdata = ac_build_gather_values(&ctx->ac, out, num_comps);
+ break;
+ }
+ /* as v4i32 (aligned to 4) */
out[3] = LLVMGetUndef(ctx->i32);
/* fall through */
case 4: /* as v4i32 */
@@ -3125,8 +3130,10 @@ static void si_write_tess_factors(struct lp_build_tgsi_context *bld_base,
tf_outer_offset = get_tcs_tes_buffer_address(ctx, rel_patch_id, NULL,
LLVMConstInt(ctx->i32, param_outer, 0));
- outer_vec = ac_build_gather_values(&ctx->ac, outer,
- util_next_power_of_two(outer_comps));
+ unsigned outer_vec_size =
+ ac_has_vec3_support(ctx->screen->info.chip_class, false) ?
+ outer_comps : util_next_power_of_two(outer_comps);
+ outer_vec = ac_build_gather_values(&ctx->ac, outer, outer_vec_size);
ac_build_buffer_store_dword(&ctx->ac, buf, outer_vec,
outer_comps, tf_outer_offset,