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authorRob Clark <[email protected]>2019-10-11 11:35:53 -0700
committerRob Clark <[email protected]>2019-10-18 21:11:54 +0000
commitaf817a44c15a387c920ec13a7f70aee4bd4a1a8c (patch)
tree03c014ea9efd203f78b2f8f72971e2f9b1fc88ce /src
parent35692fab86ba5315a27572bf7f9bd85849ddbb5a (diff)
freedreno/ir3: track sysval slot for inputs
Will be needed for special handling of SYSTEM_VALUE_BARYCENTRIC_PIXEL (ij_pix) when pre-fs texture fetch is enabled. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Kristian H. Kristensen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/freedreno/ir3/ir3.h7
-rw-r--r--src/freedreno/ir3/ir3_compiler_nir.c4
-rw-r--r--src/freedreno/ir3/ir3_group.c1
3 files changed, 12 insertions, 0 deletions
diff --git a/src/freedreno/ir3/ir3.h b/src/freedreno/ir3/ir3.h
index b595202cbda..f7a87ee076a 100644
--- a/src/freedreno/ir3/ir3.h
+++ b/src/freedreno/ir3/ir3.h
@@ -267,6 +267,13 @@ struct ir3_instruction {
struct {
int off; /* component/offset */
} fo;
+ struct {
+ /* for sysvals, identifies the sysval type. Mostly so we can
+ * identify the special cases where a sysval should not be DCE'd
+ * (currently, just pre-fs texture fetch)
+ */
+ gl_system_value sysval;
+ } input;
};
/* transient values used during various algorithms: */
diff --git a/src/freedreno/ir3/ir3_compiler_nir.c b/src/freedreno/ir3/ir3_compiler_nir.c
index 21a9f57a381..081d4cf19ec 100644
--- a/src/freedreno/ir3/ir3_compiler_nir.c
+++ b/src/freedreno/ir3/ir3_compiler_nir.c
@@ -68,6 +68,7 @@ create_input_compmask(struct ir3_context *ctx, unsigned n, unsigned compmask)
struct ir3_instruction *in;
in = ir3_instr_create(ctx->in_block, OPC_META_INPUT);
+ in->input.sysval = ~0;
ir3_reg_create(in, n, 0);
in->regs[0]->wrmask = compmask;
@@ -1197,6 +1198,9 @@ static void add_sysval_input_compmask(struct ir3_context *ctx,
unsigned r = regid(so->inputs_count, 0);
unsigned n = so->inputs_count++;
+ assert(instr->opc == OPC_META_INPUT);
+ instr->input.sysval = slot;
+
so->inputs[n].sysval = true;
so->inputs[n].slot = slot;
so->inputs[n].compmask = compmask;
diff --git a/src/freedreno/ir3/ir3_group.c b/src/freedreno/ir3/ir3_group.c
index 397f8d6f8a7..4ff362b9990 100644
--- a/src/freedreno/ir3/ir3_group.c
+++ b/src/freedreno/ir3/ir3_group.c
@@ -60,6 +60,7 @@ static void arr_insert_mov_in(void *arr, int idx, struct ir3_instruction *instr)
debug_assert(instr->regs_count == 1);
in = ir3_instr_create(instr->block, OPC_META_INPUT);
+ in->input.sysval = instr->input.sysval;
ir3_reg_create(in, instr->regs[0]->num, 0);
/* create src reg for meta:in and fixup to now be a mov: */