summaryrefslogtreecommitdiffstats
path: root/src
diff options
context:
space:
mode:
authorDave Airlie <[email protected]>2009-04-09 10:51:10 +1000
committerDave Airlie <[email protected]>2009-04-09 10:51:10 +1000
commit5e361c47abf2ee20140628d327eda9b39351d415 (patch)
tree5372e31ad8b2ff2828dfb286f93cf79b7fd217c6 /src
parent1ec0efa7d3a7fb0f3f81b83677c415cf835a7efc (diff)
r300: fix color tiling
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/r300/r300_cmdbuf.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index 2dd2c6a4df1..c575c9ac496 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -214,6 +214,7 @@ static void emit_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom)
struct radeon_renderbuffer *rrb;
uint32_t cbpitch;
uint32_t offset = r300->radeon.state.color.draw_offset;
+ uint32_t dw = 6;
rrb = radeon_get_colorbuffer(&r300->radeon);
if (!rrb || !rrb->bo) {
@@ -230,11 +231,16 @@ static void emit_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom)
if (rrb->bo->flags & RADEON_BO_FLAGS_MACRO_TILE)
cbpitch |= R300_COLOR_TILE_ENABLE;
- BEGIN_BATCH_NO_AUTOSTATE(8);
+ if (r300->radeon.radeonScreen->kernel_mm)
+ dw += 2;
+ BEGIN_BATCH_NO_AUTOSTATE(dw);
OUT_BATCH_REGSEQ(R300_RB3D_COLOROFFSET0, 1);
OUT_BATCH_RELOC(offset, rrb->bo, offset, 0, RADEON_GEM_DOMAIN_VRAM, 0);
OUT_BATCH_REGSEQ(R300_RB3D_COLORPITCH0, 1);
- OUT_BATCH_RELOC(cbpitch, rrb->bo, cbpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0);
+ if (!r300->radeon.radeonScreen->kernel_mm)
+ OUT_BATCH(cbpitch);
+ else
+ OUT_BATCH_RELOC(cbpitch, rrb->bo, cbpitch, 0, RADEON_GEM_DOMAIN_VRAM, 0);
END_BATCH();
if (r300->radeon.radeonScreen->driScreen->dri2.enabled) {
if (r300->radeon.radeonScreen->chip_family >= CHIP_FAMILY_RV515) {