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authorCorbin Simpson <MostAwesomeDude@gmail.com>2009-02-08 01:07:03 -0800
committerCorbin Simpson <MostAwesomeDude@gmail.com>2009-02-08 01:07:03 -0800
commit360e700a43ce3914d7f336593f380562ca190898 (patch)
tree0024797e73cab29d86c2a83fd2f26ce7f8bc8288 /src
parentea3398cf3395fd36ac6edc717f2680361ac5e239 (diff)
r300: Add SW TCL paths for clear.
This should make things work for people on RSxxx chipsets.
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/r300/r300_surface.c61
1 files changed, 42 insertions, 19 deletions
diff --git a/src/gallium/drivers/r300/r300_surface.c b/src/gallium/drivers/r300/r300_surface.c
index bbd2ade64ac..1e1f96a7f96 100644
--- a/src/gallium/drivers/r300/r300_surface.c
+++ b/src/gallium/drivers/r300/r300_surface.c
@@ -153,7 +153,17 @@ OUT_CS_REG(0x4F34, 0x00000000);
OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000);
OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000);
R300_PACIFY;
-OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0, 0x21030003);
+if (caps->has_tcl) {
+ OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0,
+ (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) |
+ ((R300_LAST_VEC | (1 << R300_DST_VEC_LOC_SHIFT) |
+ R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT));
+} else {
+ OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0,
+ (R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) |
+ ((R300_LAST_VEC | (2 << R300_DST_VEC_LOC_SHIFT) |
+ R300_DATA_TYPE_FLOAT_4) << R300_DATA_TYPE_1_SHIFT));
+}
OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000000);
OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_EXT_0, 0xF688F688);
OUT_CS_REG(R300_VAP_VTX_STATE_CNTL, 0x1);
@@ -173,7 +183,11 @@ OUT_CS_32F((float)y);
OUT_CS_32F(1.0);
OUT_CS_32F(0.0);
-OUT_CS_REG(R300_VAP_CLIP_CNTL, 0x0001C000);
+if (caps->has_tcl) {
+ OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE |
+ R300_PS_UCP_MODE_CLIP_AS_TRIFAN);
+}
+
OUT_CS_REG(R300_GA_POINT_SIZE, ((h * 6) & R300_POINTSIZE_Y_MASK) |
((w * 6) << R300_POINTSIZE_X_SHIFT));
@@ -257,23 +271,32 @@ if (caps->is_r500) {
}
/* XXX these magic numbers should be explained when
* this becomes a cached state object */
-OUT_CS_REG(R300_VAP_CNTL, 0xA | (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) |
- (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT));
-OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000);
-OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000);
-OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001);
-R300_PACIFY;
-/* XXX translate these back into normal instructions */
-OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1);
-OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0);
-OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF00203);
-OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10001);
-OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248001);
-OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0);
-OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203);
-OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021);
-OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021);
-OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0);
+if (caps->has_tcl) {
+ OUT_CS_REG(R300_VAP_CNTL, 0xA |
+ (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) |
+ (0xB << R300_VF_MAX_VTX_NUM_SHIFT) |
+ (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT));
+ OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000);
+ OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000);
+ OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001);
+ R300_PACIFY;
+ /* XXX translate these back into normal instructions */
+ OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1);
+ OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0);
+ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF00203);
+ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10001);
+ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248001);
+ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0);
+ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xF02203);
+ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0xD10021);
+ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x1248021);
+ OUT_CS_REG(R300_VAP_PVS_UPLOAD_DATA, 0x0);
+} else {
+ OUT_CS_REG(R300_VAP_CNTL, 0xA |
+ (0x5 << R300_PVS_NUM_CNTLRS_SHIFT) |
+ (0x5 << R300_VF_MAX_VTX_NUM_SHIFT) |
+ (caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT));
+}
R300_PACIFY;
END_CS;