diff options
author | Jordan Justen <[email protected]> | 2014-03-06 09:18:14 -0800 |
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committer | Kenneth Graunke <[email protected]> | 2014-06-26 11:50:34 -0700 |
commit | a46cb6a971b136f41e24739551f6d36ecc1694c0 (patch) | |
tree | 8212407909f9c8933aee8fc36fb8f9fd2f5dcba2 /src | |
parent | 7c2946fc237616e60ed1d3bb284256a3d1183c79 (diff) |
i965: Add auxiliary surface field #defines for Broadwell.
Signed-off-by: Jordan Justen <[email protected]>
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Ben Widawsky <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index f89b7a5a5f2..88d18a32292 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -580,6 +580,16 @@ #define GEN7_SURFACE_MCS_ENABLE (1 << 0) #define GEN7_SURFACE_MCS_PITCH_SHIFT 3 #define GEN7_SURFACE_MCS_PITCH_MASK INTEL_MASK(11, 3) +#define GEN8_SURFACE_AUX_QPITCH_SHIFT 16 +#define GEN8_SURFACE_AUX_QPITCH_MASK INTEL_MASK(30, 16) +#define GEN8_SURFACE_AUX_PITCH_SHIFT 3 +#define GEN8_SURFACE_AUX_PITCH_MASK INTEL_MASK(11, 3) +#define GEN8_SURFACE_AUX_MODE_MASK INTEL_MASK(2, 0) + +#define GEN8_SURFACE_AUX_MODE_NONE 0 +#define GEN8_SURFACE_AUX_MODE_MCS 1 +#define GEN8_SURFACE_AUX_MODE_APPEND 2 +#define GEN8_SURFACE_AUX_MODE_HIZ 3 /* Surface state DW7 */ #define GEN7_SURFACE_CLEAR_COLOR_SHIFT 28 |