diff options
author | Kenneth Graunke <[email protected]> | 2016-12-13 23:47:05 -0800 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2016-12-14 21:15:39 -0800 |
commit | 84e19322d3a24f7d90bdea09298f1ad55c5e0f04 (patch) | |
tree | a49610bcf4a6f80b8ade22b9a99ba01ef4c32cad /src | |
parent | fd3120d85c295eeeb3b6c9a60372506ae48f5fdb (diff) |
i965/vec4: Fix TCS output reads with non-zero component qualifiers.
We want to perform the URB read to a vec4 temporary, with no writemask,
then issue a MOV to swizzle the data and store it to the actual
destination, using the final writemask.
We were doing this wrong. For example, let's say we wanted to read
a vec2 stored in components 2-3 of a vec4. We would generate a URB
read message of:
SEND <actual destination>.XY <header with mask set to XY>
MOV <actual destination>.XY <actual destination>.ZW
This doesn't work, because the URB message reads the .XY components
of the vec4, rather than the ZW. It writes to the right place, but
with the wrong data. Then the MOV comes along and overwrites it
with data that didn't even come from the URB at all.
Instead we want to do:
SEND <temporary> <header with mask set to ZW>
MOV <actual destination>.XY <temporary>.ZW
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp index c7278e4a787..b6ff4fda974 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_tcs.cpp @@ -209,19 +209,19 @@ vec4_tcs_visitor::emit_output_urb_read(const dst_reg &dst, /* Set up the message header to reference the proper parts of the URB */ dst_reg header = dst_reg(this, glsl_type::uvec4_type); inst = emit(TCS_OPCODE_SET_OUTPUT_URB_OFFSETS, header, - brw_imm_ud(dst.writemask), indirect_offset); + brw_imm_ud(dst.writemask << first_component), indirect_offset); inst->force_writemask_all = true; - /* Read into a temporary, ignoring writemasking. */ vec4_instruction *read = emit(VEC4_OPCODE_URB_READ, dst, src_reg(header)); read->offset = base_offset; read->mlen = 1; read->base_mrf = -1; if (first_component) { - src_reg src = src_reg(dst); - src.swizzle = BRW_SWZ_COMP_INPUT(first_component); - emit(MOV(dst, src)); + /* Read into a temporary and copy with a swizzle and writemask. */ + read->dst = retype(dst_reg(this, glsl_type::ivec4_type), dst.type); + emit(MOV(dst, swizzle(src_reg(read->dst), + BRW_SWZ_COMP_INPUT(first_component)))); } } |