diff options
| author | Christian König <[email protected]> | 2012-08-21 14:41:29 +0200 |
|---|---|---|
| committer | Christian König <[email protected]> | 2012-08-22 15:33:49 +0200 |
| commit | 07838603b9a69c05911edbcd351bfce5ad9b5a2c (patch) | |
| tree | 438ad92c56e18e9c0c4a077572f05e6b1739f442 /src | |
| parent | 8d1a9a984f33d8e45f932a9f47cdd57da617a919 (diff) | |
radeonsi: fix SPI_PS_INPUT_ENA handling
We need to enable at least one interpolation mode,
otherwise the GPU will hang.
Signed-off-by: Christian König <[email protected]>
Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'src')
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state_draw.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index 76550c2bdcb..fda8b0bd6a5 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -103,7 +103,7 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s unsigned num_sgprs, num_user_sgprs; int ninterp = 0; boolean have_linear = FALSE, have_centroid = FALSE, have_perspective = FALSE; - unsigned spi_baryc_cntl; + unsigned spi_baryc_cntl, spi_ps_input_ena; uint64_t va; if (si_pipe_shader_create(ctx, shader)) @@ -168,8 +168,19 @@ static void si_pipe_shader_ps(struct pipe_context *ctx, struct si_pipe_shader *s S_0286E0_LINEAR_CENTROID_CNTL(1) : S_0286E0_LINEAR_CENTER_CNTL(1); si_pm4_set_reg(pm4, R_0286E0_SPI_BARYC_CNTL, spi_baryc_cntl); - si_pm4_set_reg(pm4, R_0286CC_SPI_PS_INPUT_ENA, shader->spi_ps_input_ena); - si_pm4_set_reg(pm4, R_0286D0_SPI_PS_INPUT_ADDR, shader->spi_ps_input_ena); + spi_ps_input_ena = shader->spi_ps_input_ena; + /* we need to enable at least one of them, otherwise we hang the GPU */ + if (!spi_ps_input_ena & (C_0286CC_PERSP_SAMPLE_ENA | + C_0286CC_PERSP_CENTROID_ENA | + C_0286CC_PERSP_PULL_MODEL_ENA | + C_0286CC_LINEAR_SAMPLE_ENA | + C_0286CC_LINEAR_CENTER_ENA | + C_0286CC_LINEAR_CENTROID_ENA | + C_0286CC_LINE_STIPPLE_TEX_ENA)) { + spi_ps_input_ena |= S_0286CC_PERSP_SAMPLE_ENA(1); + } + si_pm4_set_reg(pm4, R_0286CC_SPI_PS_INPUT_ENA, spi_ps_input_ena); + si_pm4_set_reg(pm4, R_0286D0_SPI_PS_INPUT_ADDR, spi_ps_input_ena); si_pm4_set_reg(pm4, R_0286D8_SPI_PS_IN_CONTROL, spi_ps_in_control); /* XXX: Depends on Z buffer format? */ |