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authorPaul Berry <[email protected]>2013-08-10 21:57:59 -0700
committerPaul Berry <[email protected]>2013-09-11 11:17:24 -0700
commitbf5419e389a4a8339699e25ddb6cbe902cc22357 (patch)
treedee4a5eef28547ce991b041a44f686cca1f8fdab /src
parent247f90c77e8f3894e963d796628246ba0bde27b5 (diff)
i965/gen7: Allow URB_WRITE channel masks to be used.
Previously, brw_urb_WRITE() would unconditionally override the channel masks in the URB_WRITE message to 0xff (indicating that all channels should be written to the URB). In order to support geometry shader EndPrimitive functionality, we'll need the ability to set the channel masks programatically, so that we can output just 32 of the control data bits at a time. So this patch adds a flag that will prevent brw_urb_WRITE() from overriding them. Reviewed-by: Ian Romanick <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu.h6
-rw-r--r--src/mesa/drivers/dri/i965/brw_eu_emit.c2
2 files changed, 7 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h
index 6ac1c684d21..4d47cdd6221 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -258,6 +258,12 @@ enum brw_urb_write_flags {
BRW_URB_WRITE_PER_SLOT_OFFSET = 0x10,
/**
+ * Indicates that the channel masks in the URB_WRITE message header should
+ * not be overridden to 0xff (gen == 7).
+ */
+ BRW_URB_WRITE_USE_CHANNEL_MASKS = 0x20,
+
+ /**
* Convenient combination of flags: end the thread while simultaneously
* marking the given URB entry as complete.
*/
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 36c494ee2b3..a99a3544a2e 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -2224,7 +2224,7 @@ void brw_urb_WRITE(struct brw_compile *p,
gen6_resolve_implied_move(p, &src0, msg_reg_nr);
- if (brw->gen == 7) {
+ if (brw->gen == 7 && !(flags & BRW_URB_WRITE_USE_CHANNEL_MASKS)) {
/* Enable Channel Masks in the URB_WRITE_HWORD message header */
brw_push_insn_state(p);
brw_set_access_mode(p, BRW_ALIGN_1);