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authorKenneth Graunke <[email protected]>2013-08-13 13:57:13 -0700
committerKenneth Graunke <[email protected]>2013-10-28 11:29:36 -0700
commit5563dfabc8c1b7cc1a67e4d64311ea29aef43087 (patch)
tree60adf15056124fba21a41fbb9332ca23a4e435d7 /src
parent29e5d5db5149f721e6c15a9aee6f8135a98ba5c8 (diff)
i965: Also emit HiZ and Stencil packets when disabling depth on Gen6.
The normal drawing path does this, and it's necessary on Ivybridge, so let's try it on Sandybridge too. It's not explicitly documented as necessary, but might help with hangs. Signed-off-by: Kenneth Graunke <[email protected]> Tested-by: Xinkai Chen <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Cc: "9.2" <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/mesa/drivers/dri/i965/gen6_blorp.cpp12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
index ce215c2949e..8735270172c 100644
--- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp
@@ -930,6 +930,18 @@ gen6_blorp_emit_depth_disable(struct brw_context *brw,
OUT_BATCH(0);
OUT_BATCH(0);
ADVANCE_BATCH();
+
+ BEGIN_BATCH(3);
+ OUT_BATCH(_3DSTATE_HIER_DEPTH_BUFFER << 16 | (3 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
+
+ BEGIN_BATCH(3);
+ OUT_BATCH(_3DSTATE_STENCIL_BUFFER << 16 | (3 - 2));
+ OUT_BATCH(0);
+ OUT_BATCH(0);
+ ADVANCE_BATCH();
}