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authorMichal Krol <[email protected]>2008-08-13 17:31:26 +0200
committerMichal Krol <[email protected]>2008-08-13 17:35:20 +0200
commit4b929b32d03a58d80cacbd63c172dbd7221c8a8f (patch)
treedd9ded01ff82d657a5acaf291571d697d050ad4d /src
parent2caaba8195d1019702246bd7f0c02aa95364a8bd (diff)
tgsi: Validate instruction opcode and operand counts.
Diffstat (limited to 'src')
-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_sanity.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_sanity.c b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
index 2e3ec96b5b5..0b5bdd6ba1c 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_sanity.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_sanity.c
@@ -27,6 +27,7 @@
#include "pipe/p_debug.h"
#include "tgsi_sanity.h"
+#include "tgsi_info.h"
#include "tgsi_iterate.h"
#define MAX_REGISTERS 256
@@ -170,6 +171,7 @@ iter_instruction(
struct tgsi_full_instruction *inst )
{
struct sanity_check_ctx *ctx = (struct sanity_check_ctx *) iter;
+ const struct tgsi_opcode_info *info;
uint i;
/* There must be no other instructions after END.
@@ -181,6 +183,19 @@ iter_instruction(
ctx->index_of_END = ctx->num_instructions;
}
+ info = tgsi_get_opcode_info( inst->Instruction.Opcode );
+ if (info == NULL) {
+ report_error( ctx, "Invalid instruction opcode" );
+ return TRUE;
+ }
+
+ if (info->num_dst != inst->Instruction.NumDstRegs) {
+ report_error( ctx, "Invalid number of destination operands" );
+ }
+ if (info->num_src != inst->Instruction.NumSrcRegs) {
+ report_error( ctx, "Invalid number of source operands" );
+ }
+
/* Check destination and source registers' validity.
* Mark the registers as used.
*/