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authorMarek Olšák <[email protected]>2012-01-29 03:17:18 +0100
committerMarek Olšák <[email protected]>2012-01-31 02:17:46 +0100
commit2ffa8af9db4a4a9cf4cb5bb524bd8a57c53daca0 (patch)
treeaccc20a228613dc7a3216e356579b2b1eeb5032f /src
parente3032a052321ea1fdfbca090618149ae1ed33911 (diff)
r600g: set full register mask for CB_COLOR_CONTROL on evergreen
We don't set the other bits anywhere else. Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/r600/evergreen_state.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 57942fb0bc9..7fd3a368bf7 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -750,7 +750,7 @@ static void *evergreen_create_blend_state(struct pipe_context *ctx,
blend->cb_target_mask = target_mask;
r600_pipe_state_add_reg(rstate, R_028808_CB_COLOR_CONTROL,
- color_control, 0xFFFFFFFD, NULL, 0);
+ color_control, 0xFFFFFFFF, NULL, 0);
if (rctx->chip_class != CAYMAN)
r600_pipe_state_add_reg(rstate, R_028C3C_PA_SC_AA_MASK, 0xFFFFFFFF, 0xFFFFFFFF, NULL, 0);