diff options
| author | Nicolai Hähnle <[email protected]> | 2017-09-08 15:15:08 +0200 |
|---|---|---|
| committer | Nicolai Hähnle <[email protected]> | 2017-09-18 11:25:19 +0200 |
| commit | 8c56c45cd48e940283a8d3e951750c57694718f9 (patch) | |
| tree | 16af1e409dd10d6c248d9392d5355b532fd58c49 /src/util/xmlpool/t_options.h | |
| parent | aab134cfa57cd2f72d4234fe3f41e392e6a4f48d (diff) | |
radeonsi: add drirc option "radeonsi_assume_no_z_fights"
This option enables a performance optimization where typical non-blending
draws with depth buffer may be rasterized out-of-order (on VI+, multi-SE
chips).
This optimization can lead to incorrect results when an applications
renders multiple objects with the same Z value at the same pixel, so we
will never enable it by default. But there may be applications that could
benefit from white-listing.
Reviewed-by: Marek Olšák <[email protected]>
Tested-by: Dieter Nützel <[email protected]>
Diffstat (limited to 'src/util/xmlpool/t_options.h')
| -rw-r--r-- | src/util/xmlpool/t_options.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/util/xmlpool/t_options.h b/src/util/xmlpool/t_options.h index d3f31fc94b1..c92215183a5 100644 --- a/src/util/xmlpool/t_options.h +++ b/src/util/xmlpool/t_options.h @@ -438,3 +438,8 @@ DRI_CONF_OPT_END DRI_CONF_OPT_BEGIN_B(radeonsi_enable_sisched, def) \ DRI_CONF_DESC(en,gettext("Use the LLVM sisched option for shader compiles")) \ DRI_CONF_OPT_END + +#define DRI_CONF_RADEONSI_ASSUME_NO_Z_FIGHTS(def) \ +DRI_CONF_OPT_BEGIN_B(radeonsi_assume_no_z_fights, def) \ + DRI_CONF_DESC(en,gettext("Assume no Z fights (enables aggressive out-of-order rasterization to improve performance; may cause rendering errors)")) \ +DRI_CONF_OPT_END |