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authorIago Toral Quiroga <itoral@igalia.com>2018-05-30 12:14:14 +0200
committerJuan A. Suarez Romero <jasuarez@igalia.com>2019-04-18 11:05:18 +0200
commitaaae24179ff1007776d2f3a5a813f2c52dc83eba (patch)
tree7f311bfa8aa6be3b4be8052dac563dd1d1cf6d6c /src/util/xmlpool.h
parent60c7c6d3ba4ab41eec7f48d6266321e10e2e50df (diff)
intel/compiler: fix ddy for half-float in Broadwell
Broadwell has restrictions that apply to Align16 half-float that make the Align16 implementation of this invalid for this platform. Use the gen11 path for this instead, which uses Align1 mode. The restriction is not present in cherryview, gen9 or gen10, where the Align16 implementation seems to work just fine. v2: - Rework the comment in the code, move the PRM citation from the commit message to the comment in the code (Matt) - Cherryview isn't affected, only Broadwell (Matt) Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> (v1) Reviewed-by: Matt Turner <mattst88@gmail.com>
Diffstat (limited to 'src/util/xmlpool.h')
0 files changed, 0 insertions, 0 deletions