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author | Samuel Pitoiset <[email protected]> | 2020-04-14 09:42:48 +0200 |
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committer | Samuel Pitoiset <[email protected]> | 2020-04-15 10:12:44 +0200 |
commit | 08a396033be1d7ceddf48da0563a7e4d2cb64429 (patch) | |
tree | 4494456822a6c6c1b96e93f30ad80071da513df7 /src/util/u_cpu_detect.c | |
parent | 9bf8e923863230914f6bf2a4abcf257cb8778ee7 (diff) |
aco: fix nir_op_frexp_exp with 16-bit floats and negative exponents
v_frexp_exp_i16_f16 returns the two's complement for negative
exponents. For example, with 0.333252 it returns 0.666504 for
the mantissa and 65535 for the exponent (-1 in decimal).
RADV/LLVM and AMDVLK do a v_bfe_i32 and AMDGPU-PRO uses SDWA with
the sign extension bit set. The latter is probably what we want to
do in long term but for now RA doesn't support changing non-SDWA
instructions to SDWA if useful/needed.
Fixes dEQP-VK.glsl.builtin.precision_fp16_storage16b.frexp.compute.*.
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Daniel Schürmann <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4546>
Diffstat (limited to 'src/util/u_cpu_detect.c')
0 files changed, 0 insertions, 0 deletions