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authorRoland Scheidegger <[email protected]>2016-01-29 03:18:36 +0100
committerMatt Turner <[email protected]>2016-04-12 14:37:01 -0700
commit0e605d9b3af68b67dceb8eeaeabebe91bc9cf31c (patch)
tree8598709bcaa7318a1d5b43d8f2b7e76b25332362 /src/util/Makefile.am
parentfc88b4babf86e93421e7a9da29ae125712891390 (diff)
i965/tiled_memcpy: Provide SSE2 for RGBA8 <-> BGRA8 swizzle.
The existing code uses SSSE3, and because it isn't compiled in a separate file compiled with that, it is usually not used (that, of course, could be fixed...), whereas SSE2 is always present with 64-bit builds. This should be pretty much as fast as the pshufb version, albeit those code paths aren't really used on chips without llc in any case. v2: fix andnot argument order, add comments v3: use pshuflw/hw instead of shifts (suggested by Matt Turner), cut comments v4: [mattst88] Rebase Reviewed-by: Matt Turner <[email protected]>
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