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authorIcecream95 <[email protected]>2020-06-06 00:24:22 +1200
committerMarge Bot <[email protected]>2020-06-10 13:54:03 +0000
commitddc2ae32cf40f2aa7d7065720e10ecb01d260a47 (patch)
treea7a6e870538b8cf81217d694f443804a9b564d71 /src/panfrost
parent5f5a9737096aedf6f2b88f333228e86f8f9d3086 (diff)
pan/mdg: Move r1.w writeout to branch->dest
There will need to be sources for depth and stencil writeout, so something has to be moved to the dest of the writeout branch. Reviewed-by: Alyssa Rosenzweig <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5065>
Diffstat (limited to 'src/panfrost')
-rw-r--r--src/panfrost/midgard/midgard_ra.c8
-rw-r--r--src/panfrost/midgard/midgard_schedule.c4
2 files changed, 6 insertions, 6 deletions
diff --git a/src/panfrost/midgard/midgard_ra.c b/src/panfrost/midgard/midgard_ra.c
index 112485b8b83..9f092b6dd3b 100644
--- a/src/panfrost/midgard/midgard_ra.c
+++ b/src/panfrost/midgard/midgard_ra.c
@@ -389,7 +389,7 @@ mir_compute_interference(
midgard_block *block = (midgard_block *) _block;
mir_foreach_instr_in_block_rev(block, ins) {
if (ins->writeout)
- r1w = ins->src[2];
+ r1w = ins->dest;
}
if (r1w != ~0)
@@ -616,10 +616,10 @@ allocate_registers(compiler_context *ctx, bool *spilled)
if (ins->src[1] < ctx->temp_count)
l->solutions[ins->src[1]] = (16 * 1) + COMPONENT_Z * 4;
- if (ins->src[2] < ctx->temp_count)
- l->solutions[ins->src[2]] = (16 * 1) + COMPONENT_W * 4;
+ if (ins->dest < ctx->temp_count)
+ l->solutions[ins->dest] = (16 * 1) + COMPONENT_W * 4;
}
-
+
mir_compute_interference(ctx, l);
*spilled = !lcra_solve(l);
diff --git a/src/panfrost/midgard/midgard_schedule.c b/src/panfrost/midgard/midgard_schedule.c
index d823155ccf1..dc127dcea90 100644
--- a/src/panfrost/midgard/midgard_schedule.c
+++ b/src/panfrost/midgard/midgard_schedule.c
@@ -972,8 +972,8 @@ mir_schedule_alu(
vadd->unit = UNIT_VADD;
vadd->mask = 0x1;
- branch->src[2] = vadd->dest;
- branch->src_types[2] = vadd->dest_type;
+ branch->dest = vadd->dest;
+ branch->dest_type = vadd->dest_type;
}
mir_choose_alu(&vadd, instructions, worklist, len, &predicate, UNIT_VADD);