diff options
author | Alyssa Rosenzweig <[email protected]> | 2019-12-06 11:49:43 -0500 |
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committer | Alyssa Rosenzweig <[email protected]> | 2019-12-12 11:42:06 -0500 |
commit | b6d1b32d58623fdd48c0ca2bd81649e4b9d1812b (patch) | |
tree | 6881f2720f0d984fa1fdb84e3a3388239daaf97d /src/panfrost/midgard | |
parent | 3c0f1ea58c963194baa547f588155b00d5768bd6 (diff) |
pan/midgard: Remove consecutive_skip code
This has been unused since the beginning since it's broken. Let's toss
it so it doesn't get in the way of further fixes. Bigger to fish to fry.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src/panfrost/midgard')
-rw-r--r-- | src/panfrost/midgard/midgard_ra.c | 26 |
1 files changed, 8 insertions, 18 deletions
diff --git a/src/panfrost/midgard/midgard_ra.c b/src/panfrost/midgard/midgard_ra.c index 2c8965b7916..58693a7e950 100644 --- a/src/panfrost/midgard/midgard_ra.c +++ b/src/panfrost/midgard/midgard_ra.c @@ -771,27 +771,18 @@ mir_spill_register( * spilling is to use memory to back work registers) */ mir_foreach_block(ctx, block) { - bool consecutive_skip = false; - unsigned consecutive_index = 0; - mir_foreach_instr_in_block(block, ins) { /* We can't rewrite the moves used to spill in the * first place. These moves are hinted. */ if (ins->hint) continue; - if (!mir_has_arg(ins, spill_node)) { - consecutive_skip = false; - continue; - } + /* If we don't use the spilled value, nothing to do */ + if (!mir_has_arg(ins, spill_node)) continue; - if (consecutive_skip) { - /* Rewrite */ - mir_rewrite_index_src_single(ins, spill_node, consecutive_index); - continue; - } + unsigned index = 0; if (!is_special_w) { - consecutive_index = ++spill_index; + index = ++spill_index; midgard_instruction *before = ins; @@ -803,11 +794,11 @@ mir_spill_register( if (is_special) { /* Move */ - st = v_mov(spill_node, consecutive_index); + st = v_mov(spill_node, index); st.no_spill = true; } else { /* TLS load */ - st = v_load_store_scratch(consecutive_index, spill_slot, false, 0xF); + st = v_load_store_scratch(index, spill_slot, false, 0xF); } /* Mask the load based on the component count @@ -816,15 +807,14 @@ mir_spill_register( st.mask = mir_from_bytemask(read_bytemask, midgard_reg_mode_32); mir_insert_instruction_before_scheduled(ctx, block, before, st); - // consecutive_skip = true; } else { /* Special writes already have their move spilled in */ - consecutive_index = spill_slot; + index = spill_slot; } /* Rewrite to use */ - mir_rewrite_index_src_single(ins, spill_node, consecutive_index); + mir_rewrite_index_src_single(ins, spill_node, index); if (!is_special) ctx->fills++; |