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authorAlyssa Rosenzweig <[email protected]>2019-11-23 16:08:02 -0500
committerTomeu Vizoso <[email protected]>2019-12-16 09:10:33 +0000
commit60396340f5b9bef009e8bc34696a981f5e2b3ae2 (patch)
treeb1bf5d78b1b9d111cfa5d7287ee464703b6ed5b2 /src/panfrost/midgard/midgard_schedule.c
parent281cc6f9a62ea96e982baecae0630ac368034857 (diff)
pan/midgard: Writeout per render target
The flow is considerably more complicated. Instead of one writeout loop like usual, we have a separate write loop for each render target. This requires some scheduling shenanigans to get right. Signed-off-by: Alyssa Rosenzweig <[email protected]> Reviewed-by: Tomeu Visoso <[email protected]>
Diffstat (limited to 'src/panfrost/midgard/midgard_schedule.c')
-rw-r--r--src/panfrost/midgard/midgard_schedule.c13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/panfrost/midgard/midgard_schedule.c b/src/panfrost/midgard/midgard_schedule.c
index 6d83330a502..592abc7f5e8 100644
--- a/src/panfrost/midgard/midgard_schedule.c
+++ b/src/panfrost/midgard/midgard_schedule.c
@@ -910,6 +910,19 @@ mir_schedule_alu(
unreachable("Bad condition");
}
+ /* If we have a render target reference, schedule a move for it */
+
+ if (branch && branch->writeout && branch->constants[0]) {
+ midgard_instruction mov = v_mov(~0, make_compiler_temp(ctx));
+ sadd = mem_dup(&mov, sizeof(midgard_instruction));
+ sadd->unit = UNIT_SADD;
+ sadd->mask = 0x1;
+ sadd->has_inline_constant = true;
+ sadd->inline_constant = branch->constants[0];
+ branch->src[1] = mov.dest;
+ /* TODO: Don't leak */
+ }
+
/* Stage 2, let's schedule sadd before vmul for writeout */
mir_choose_alu(&sadd, instructions, worklist, len, &predicate, UNIT_SADD);