diff options
author | Alyssa Rosenzweig <[email protected]> | 2019-07-26 11:15:31 -0700 |
---|---|---|
committer | Alyssa Rosenzweig <[email protected]> | 2019-07-26 13:38:41 -0700 |
commit | 159abd527ec191e8274876162b30079c4ea39600 (patch) | |
tree | b66297d95bdf5715b1a02141dc3ca564ea032295 /src/panfrost/midgard/midgard_compile.c | |
parent | 9beb3391b5500b17c860356facab9fcff032693b (diff) |
pan/midgard: Introduce invert field
This will enable us to fuse inverts in various ways. Marginal hurt:
total instructions in shared programs: 3610 -> 3611 (0.03%)
instructions in affected programs: 67 -> 68 (1.49%)
helped: 0
HURT: 1
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src/panfrost/midgard/midgard_compile.c')
-rw-r--r-- | src/panfrost/midgard/midgard_compile.c | 23 |
1 files changed, 12 insertions, 11 deletions
diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c index 46f0725741b..646646423c0 100644 --- a/src/panfrost/midgard/midgard_compile.c +++ b/src/panfrost/midgard/midgard_compile.c @@ -304,12 +304,6 @@ nir_dest_index(compiler_context *ctx, nir_dest *dst) } } -static unsigned -make_compiler_temp(compiler_context *ctx) -{ - return ctx->func->impl->ssa_alloc + ctx->func->impl->reg_alloc + ctx->temp_alloc++; -} - static int sysval_for_instr(compiler_context *ctx, nir_instr *instr, unsigned *dest) { @@ -859,8 +853,8 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr) ALU_CASE(fsin, fsin); ALU_CASE(fcos, fcos); - /* Second op implicit #0 */ - ALU_CASE(inot, inor); + /* We'll set invert */ + ALU_CASE(inot, imov); ALU_CASE(iand, iand); ALU_CASE(ior, ior); ALU_CASE(ixor, ixor); @@ -1120,9 +1114,7 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr) ins.constants[0] = 0.0f; ins.alu.src2 = vector_alu_srco_unsigned(blank_alu_src_xxxx); } else if (instr->op == nir_op_inot) { - /* ~b = ~(b & b), so duplicate the source */ - ins.ssa_args.src1 = ins.ssa_args.src0; - ins.alu.src2 = ins.alu.src1; + ins.invert = true; } if ((opcode_props & UNITS_ALL) == UNIT_VLUT) { @@ -2380,6 +2372,10 @@ midgard_compile_shader_nir(struct midgard_screen *screen, nir_shader *nir, midga } } while (progress); + mir_foreach_block(ctx, block) { + midgard_lower_invert(ctx, block); + } + /* Nested control-flow can result in dead branches at the end of the * block. This messes with our analysis and is just dead code, so cull * them */ @@ -2387,6 +2383,11 @@ midgard_compile_shader_nir(struct midgard_screen *screen, nir_shader *nir, midga midgard_opt_cull_dead_branch(ctx, block); } + /* Ensure we were lowered */ + mir_foreach_instr_global(ctx, ins) { + assert(!ins->invert); + } + /* Schedule! */ schedule_program(ctx); |