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authorAlyssa Rosenzweig <[email protected]>2019-08-01 13:29:01 -0700
committerAlyssa Rosenzweig <[email protected]>2019-08-02 14:20:02 -0700
commitc908772ee47201a1f84503099d1e0767a9f9818f (patch)
treea3465670ae5dcbba46db0890cb96fafc8cf44a85 /src/panfrost/midgard/midgard.h
parent2d54fdb563829fc9a097d35169e058acd8e1e790 (diff)
pan/midgard: Split ld/st unknown to arg_1/arg_2 fields
The 16-bit field can be decomposed to two independent 8-bit fields, each representing a single (additional) argument to the load/store op, generally used for encoding registers. Addressable registers here are substantially limited compared to the main register in a load/store op. Signed-off-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src/panfrost/midgard/midgard.h')
-rw-r--r--src/panfrost/midgard/midgard.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/panfrost/midgard/midgard.h b/src/panfrost/midgard/midgard.h
index aa8b1793c99..45eaca21c42 100644
--- a/src/panfrost/midgard/midgard.h
+++ b/src/panfrost/midgard/midgard.h
@@ -505,7 +505,14 @@ __attribute__((__packed__))
unsigned reg : 5;
unsigned mask : 4;
unsigned swizzle : 8;
- unsigned unknown : 16;
+
+ /* Load/store ops can take two additional registers as arguments, but
+ * these are limited to load/store registers with only a few supported
+ * mask/swizzle combinations. The tradeoff is these are much more
+ * compact, requiring 8-bits each rather than 17-bits for a full
+ * reg/mask/swizzle */
+ unsigned arg_1 : 8;
+ unsigned arg_2 : 8;
unsigned varying_parameters : 10;