diff options
| author | Alyssa Rosenzweig <[email protected]> | 2019-07-26 11:30:06 -0700 |
|---|---|---|
| committer | Alyssa Rosenzweig <[email protected]> | 2019-07-26 13:38:41 -0700 |
| commit | 9beb3391b5500b17c860356facab9fcff032693b (patch) | |
| tree | 12d01bbbba1c3c80e85e47ff465f8739deb8d4a2 /src/panfrost/midgard/helpers.h | |
| parent | b0626c1f306b8f55911d8926f85dc13c6a327a2f (diff) | |
pan/midgard: Tag SSA/reg
Rather than putting registers after SSA in the MIR indexing, put them
side-by-side, shifted 1, using the bottom bit as the SSA/reg select.
This will allow us to generate SSA temps in the compiler.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src/panfrost/midgard/helpers.h')
| -rw-r--r-- | src/panfrost/midgard/helpers.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/panfrost/midgard/helpers.h b/src/panfrost/midgard/helpers.h index 92545cfc787..0cd2e71862c 100644 --- a/src/panfrost/midgard/helpers.h +++ b/src/panfrost/midgard/helpers.h @@ -177,8 +177,8 @@ quadword_size(int tag) #define SSA_UNUSED_1 -2 #define SSA_FIXED_SHIFT 24 -#define SSA_FIXED_REGISTER(reg) ((1 + reg) << SSA_FIXED_SHIFT) -#define SSA_REG_FROM_FIXED(reg) ((reg >> SSA_FIXED_SHIFT) - 1) +#define SSA_FIXED_REGISTER(reg) (((1 + (reg)) << SSA_FIXED_SHIFT) | 1) +#define SSA_REG_FROM_FIXED(reg) ((((reg) & ~1) >> SSA_FIXED_SHIFT) - 1) #define SSA_FIXED_MINIMUM SSA_FIXED_REGISTER(0) /* Swizzle support */ |