diff options
| author | Alyssa Rosenzweig <[email protected]> | 2019-12-19 10:35:18 -0500 |
|---|---|---|
| committer | Tomeu Vizoso <[email protected]> | 2019-12-20 09:10:26 +0100 |
| commit | ccbc9a4e6785babb832bf11499fe7538c2a30952 (patch) | |
| tree | 16acc898c3d574ab2b1ed6b73d5b55f6a3328b35 /src/panfrost/midgard/compiler.h | |
| parent | 2eef9e050f6228d134aec07e2c7fadc9d0961049 (diff) | |
pan/midgard: Implement textureOffset for 2D textures
Fixes dEQP-GLES3.functional.shaders.texture_functions.textureoffset.sampler2d_fixed_fragment.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Reviewed-by: Tomeu Vizoso <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3169>
Diffstat (limited to 'src/panfrost/midgard/compiler.h')
| -rw-r--r-- | src/panfrost/midgard/compiler.h | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/panfrost/midgard/compiler.h b/src/panfrost/midgard/compiler.h index acc1a22a866..84b6550023b 100644 --- a/src/panfrost/midgard/compiler.h +++ b/src/panfrost/midgard/compiler.h @@ -78,7 +78,7 @@ typedef struct midgard_branch { * emitted before the register allocation pass. */ -#define MIR_SRC_COUNT 3 +#define MIR_SRC_COUNT 4 #define MIR_VEC_COMPONENTS 16 typedef struct midgard_instruction { @@ -89,7 +89,7 @@ typedef struct midgard_instruction { /* Instruction arguments represented as block-local SSA * indices, rather than registers. ~0 means unused. */ - unsigned src[3]; + unsigned src[MIR_SRC_COUNT]; unsigned dest; /* vec16 swizzle, unpacked, per source */ @@ -558,7 +558,7 @@ v_mov(unsigned src, unsigned dest) midgard_instruction ins = { .type = TAG_ALU_4, .mask = 0xF, - .src = { SSA_UNUSED, src, SSA_UNUSED }, + .src = { ~0, src, ~0, ~0 }, .swizzle = SWIZZLE_IDENTITY, .dest = dest, .alu = { @@ -596,7 +596,7 @@ v_load_store_scratch( .type = TAG_LOAD_STORE_4, .mask = mask, .dest = ~0, - .src = { ~0, ~0, ~0 }, + .src = { ~0, ~0, ~0, ~0 }, .swizzle = SWIZZLE_IDENTITY_4, .load_store = { .op = is_store ? midgard_op_st_int4 : midgard_op_ld_int4, |