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authorTomeu Vizoso <[email protected]>2019-07-11 08:06:41 +0200
committerAlyssa Rosenzweig <[email protected]>2019-07-16 08:40:59 -0700
commit5a7688fdecd76c7d9cd87f6f6c93eb32870a2146 (patch)
tree0567857cb4528ecfdc70c0a1099672c6f2fb9fd0 /src/panfrost/include
parent6a441151c245d7b59b84502257a0ff1a300b8633 (diff)
panfrost: Use 64-bit descriptors globally
Midgard supports two modes of operation, 32-bit mode and 64-bit mode. The GPU is natively 64-bit, but job descriptors can be submitted in 32-bit mode. Among other changes, 32-bit mode shortens pointer sizes to use 32-bit pointers rather than the full 64-bit range. The blob decides which mode to use based on the CPU bitness, so an armhf system uses 32-bit descriptors and an aarch64 system uses 64-bit descriptors. For a while, we mimicked this, bu inevitably this caused the 32-bit support to lag behind as our reference platform is 64-bit. To combat the code staleness, we traced an older GPU paired with a 64-bit CPU (the Midgard T720 on-board the sunxi H64). From there, we could tell which fields were really about hardware and which fields were simply reflections of the descriptor bitness. From there, we decided to remove support for 32-bit descriptors entirely, using 64-bit descriptors unconditionally. There is minimal performance penalty for this in practice, and it allows us to unify these disparate code paths. This fixes: - T860 + armhf - T820 + armhf - T760 + aarch64 And will help bringup of 1st/2nd generation Midgard regardless of CPU. [Work done by Tomeu. Commit message written by Alyssa.] v2: Add comments preserving information about the old behaviour for future reference. Fix a compiler warning. (Alyssa) Signed-off-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src/panfrost/include')
-rw-r--r--src/panfrost/include/panfrost-job.h42
1 files changed, 16 insertions, 26 deletions
diff --git a/src/panfrost/include/panfrost-job.h b/src/panfrost/include/panfrost-job.h
index 0fbe0a2fa10..297d0806adc 100644
--- a/src/panfrost/include/panfrost-job.h
+++ b/src/panfrost/include/panfrost-job.h
@@ -31,7 +31,7 @@
#include <stdint.h>
#include <panfrost-misc.h>
-#define MALI_SHORT_PTR_BITS (sizeof(uintptr_t)*8)
+#define MALI_SHORT_PTR_BITS (sizeof(u64)*8)
#define MALI_FBD_HIERARCHY_WEIGHTS 8
@@ -935,7 +935,7 @@ struct mali_vertex_tiler_prefix {
* indices (width depends on flags). Thanks, guys, for not making my
* life insane for once! NULL for non-indexed draws. */
- uintptr_t indices;
+ u64 indices;
} __attribute__((packed));
/* Point size / line width can either be specified as a 32-bit float (for
@@ -947,7 +947,7 @@ struct mali_vertex_tiler_prefix {
union midgard_primitive_size {
float constant;
- uintptr_t pointer;
+ u64 pointer;
};
struct bifrost_vertex_only {
@@ -1011,34 +1011,34 @@ struct mali_vertex_tiler_postfix {
* output from the vertex shader for tiler jobs.
*/
- uintptr_t position_varying;
+ u64 position_varying;
/* An array of mali_uniform_buffer_meta's. The size is given by the
* shader_meta.
*/
- uintptr_t uniform_buffers;
+ u64 uniform_buffers;
/* This is a pointer to an array of pointers to the texture
* descriptors, number of pointers bounded by number of textures. The
* indirection is needed to accomodate varying numbers and sizes of
* texture descriptors */
- uintptr_t texture_trampoline;
+ u64 texture_trampoline;
/* For OpenGL, from what I've seen, this is intimately connected to
* texture_meta. cwabbott says this is not the case under Vulkan, hence
* why this field is seperate (Midgard is Vulkan capable). Pointer to
* array of sampler descriptors (which are uniform in size) */
- uintptr_t sampler_descriptor;
+ u64 sampler_descriptor;
- uintptr_t uniforms;
+ u64 uniforms;
u8 flags : 4;
- uintptr_t _shader_upper : MALI_SHORT_PTR_BITS - 4; /* struct shader_meta */
- uintptr_t attributes; /* struct attribute_buffer[] */
- uintptr_t attribute_meta; /* attribute_meta[] */
- uintptr_t varyings; /* struct attr */
- uintptr_t varying_meta; /* pointer */
- uintptr_t viewport;
- uintptr_t occlusion_counter; /* A single bit as far as I can tell */
+ u64 _shader_upper : MALI_SHORT_PTR_BITS - 4; /* struct shader_meta */
+ u64 attributes; /* struct attribute_buffer[] */
+ u64 attribute_meta; /* attribute_meta[] */
+ u64 varyings; /* struct attr */
+ u64 varying_meta; /* pointer */
+ u64 viewport;
+ u64 occlusion_counter; /* A single bit as far as I can tell */
/* Note: on Bifrost, this isn't actually the FBD. It points to
* bifrost_scratchpad instead. However, it does point to the same thing
@@ -1048,16 +1048,8 @@ struct mali_vertex_tiler_postfix {
} __attribute__((packed));
struct midgard_payload_vertex_tiler {
-#ifndef __LP64__
- union midgard_primitive_size primitive_size;
-#endif
-
struct mali_vertex_tiler_prefix prefix;
-#ifndef __LP64__
- u32 zero3;
-#endif
-
u16 gl_enables; // 0x5
/* Both zero for non-instanced draws. For instanced draws, a
@@ -1072,13 +1064,11 @@ struct midgard_payload_vertex_tiler {
/* Offset for first vertex in buffer */
u32 draw_start;
- uintptr_t zero5;
+ u64 zero5;
struct mali_vertex_tiler_postfix postfix;
-#ifdef __LP64__
union midgard_primitive_size primitive_size;
-#endif
} __attribute__((packed));
struct bifrost_payload_vertex {