diff options
| author | Alyssa Rosenzweig <[email protected]> | 2020-05-04 14:40:09 -0400 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-05-04 18:45:15 +0000 |
| commit | 1799435df0f2782671596dd34c1f1965931943ad (patch) | |
| tree | b78445cf9e297f31429ef87d9c949879d7aa447f /src/panfrost/bifrost | |
| parent | 2925e88996c6b819a6c0330fd61760a8be350837 (diff) | |
pan/bi: Don't schedule <32-bit IMATH to FMA
The ops don't exist.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4890>
Diffstat (limited to 'src/panfrost/bifrost')
| -rw-r--r-- | src/panfrost/bifrost/bi_schedule.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/src/panfrost/bifrost/bi_schedule.c b/src/panfrost/bifrost/bi_schedule.c index d1d99d94233..ba8c0a93387 100644 --- a/src/panfrost/bifrost/bi_schedule.c +++ b/src/panfrost/bifrost/bi_schedule.c @@ -109,6 +109,14 @@ bi_icmp(bi_instruction *ins) return ic && (ins->type == BI_CMP); } +/* No 8/16-bit IADD/ISUB on FMA */ +static bool +bi_imath_small(bi_instruction *ins) +{ + bool sz = nir_alu_type_get_type_size(ins->src_types[0]) < 32; + return sz && (ins->type == BI_IMATH); +} + /* Lowers FMOV to ADD #0, since FMOV doesn't exist on the h/w and this is the * latest time it's sane to lower (it's useful to distinguish before, but we'll * need this handle during scheduling to ensure the ports get modeled @@ -159,6 +167,7 @@ bi_schedule(bi_context *ctx) can_fma &= !bi_ambiguous_abs(ins); can_fma &= !bi_icmp(ins); + can_fma &= !bi_imath_small(ins); assert(can_fma || can_add); |