aboutsummaryrefslogtreecommitdiffstats
path: root/src/mesa
diff options
context:
space:
mode:
authorJason Ekstrand <[email protected]>2016-06-27 15:30:15 -0700
committerJason Ekstrand <[email protected]>2016-08-17 14:46:22 -0700
commitecd97893686afc9ebeead14d2123aa02dad067f1 (patch)
tree4f219361bf0473f08c852fe83bd5b9d6f49fcb79 /src/mesa
parent560a92c4fd74171832ddf45910981a51c8d1418a (diff)
i965/miptree: Fill out the isl_surf::usage field
Reviewed-by: Topi Pohjolainen <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c25
1 files changed, 24 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 6427a984a73..65f58aa9d30 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -3136,7 +3136,30 @@ intel_miptree_get_isl_surf(struct brw_context *brw,
unreachable("Invalid array layout");
}
- surf->usage = 0; /* TODO */
+ GLenum base_format = _mesa_get_format_base_format(mt->format);
+ switch (base_format) {
+ case GL_DEPTH_COMPONENT:
+ surf->usage = ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_TEXTURE_BIT;
+ break;
+ case GL_STENCIL_INDEX:
+ surf->usage = ISL_SURF_USAGE_STENCIL_BIT;
+ if (brw->gen >= 8)
+ surf->usage |= ISL_SURF_USAGE_TEXTURE_BIT;
+ break;
+ case GL_DEPTH_STENCIL:
+ /* In this case we only texture from the depth part */
+ surf->usage = ISL_SURF_USAGE_DEPTH_BIT | ISL_SURF_USAGE_STENCIL_BIT |
+ ISL_SURF_USAGE_TEXTURE_BIT;
+ break;
+ default:
+ surf->usage = ISL_SURF_USAGE_TEXTURE_BIT;
+ if (brw->format_supported_as_render_target[mt->format])
+ surf->usage = ISL_SURF_USAGE_RENDER_TARGET_BIT;
+ break;
+ }
+
+ if (_mesa_is_cube_map_texture(mt->target))
+ surf->usage |= ISL_SURF_USAGE_CUBE_BIT;
}
/* WARNING: THE SURFACE CREATED BY THIS FUNCTION IS NOT COMPLETE AND CANNOT BE