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authorKenneth Graunke <[email protected]>2010-10-21 16:43:39 -0700
committerKenneth Graunke <[email protected]>2011-01-10 15:44:32 -0800
commit4b929c75e2d868cbfb21b5dbeb1f6c689a903be6 (patch)
tree38ba6a79c317f9a201cbdf2a85005e8fd52df5ed /src/mesa
parent1feee7b1b39e54c279ffdc3c27f3911c04658430 (diff)
i965: Add new HiZ related bits to WM_STATE.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_structs.h9
1 files changed, 8 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index 8b6646ca513..6687a89e80a 100644
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -1017,7 +1017,14 @@ struct brw_wm_unit_state
GLuint enable_32_pix:1;
GLuint enable_con_32_pix:1;
GLuint enable_con_64_pix:1;
- GLuint pad0:5;
+ GLuint pad0:1;
+
+ /* These next four bits are for Ironlake+ */
+ GLuint fast_span_coverage_enable:1;
+ GLuint depth_buffer_clear:1;
+ GLuint depth_buffer_resolve_enable:1;
+ GLuint hierarchical_depth_buffer_resolve_enable:1;
+
GLuint legacy_global_depth_bias:1;
GLuint line_stipple:1;
GLuint depth_offset:1;