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authorChad Versace <[email protected]>2013-02-20 19:18:40 -0800
committerChad Versace <[email protected]>2013-04-10 10:55:10 -0700
commit2a416a9b1b1516200c9c704663022d4b17dca302 (patch)
treeef3e9ef55fe9216522e75d78fede315413f0c2d4 /src/mesa
parenta14dc4f92cdad6177d83f051a088a66e31a973bc (diff)
intel: Add field intel_mipmap_slice::has_hiz
On Haswell, HiZ will selectively be enabled on individual miptree slices to workaround a hardware bug. The new field 'has_hiz' indicates if HiZ is enabled for a given slice. Also add two new accessor functions for this field. intel_miptree_slice_has_hiz intel_renderbuffer_has_hiz The new field and accessor functions are not yet used. Also, this patch introduces no behavioral change because, in this patch, intel_miptree_alloc_hiz() sets has_hiz for all slices. Reviewed-by: Eric Anholt <[email protected]> Signed-off-by: Chad Versace <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.c9
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.h3
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.c14
-rw-r--r--src/mesa/drivers/dri/intel/intel_mipmap_tree.h20
4 files changed, 44 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index 29775687cc9..23cd97c00b3 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -943,6 +943,15 @@ intel_renderbuffer_set_needs_downsample(struct intel_renderbuffer *irb)
irb->mt->need_downsample = true;
}
+/**
+ * Does the renderbuffer have hiz enabled?
+ */
+bool
+intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb)
+{
+ return intel_miptree_slice_has_hiz(irb->mt, irb->mt_level, irb->mt_layer);
+}
+
void
intel_renderbuffer_set_needs_hiz_resolve(struct intel_renderbuffer *irb)
{
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.h b/src/mesa/drivers/dri/intel/intel_fbo.h
index 9313c3506eb..19edbe7b0b0 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.h
+++ b/src/mesa/drivers/dri/intel/intel_fbo.h
@@ -166,6 +166,9 @@ intel_get_rb_region(struct gl_framebuffer *fb, GLuint attIndex);
void
intel_renderbuffer_set_needs_downsample(struct intel_renderbuffer *irb);
+bool
+intel_renderbuffer_has_hiz(struct intel_renderbuffer *irb);
+
void
intel_renderbuffer_set_needs_hiz_resolve(struct intel_renderbuffer *irb);
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
index 19c9088791a..9c0a865c3cb 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c
@@ -1010,6 +1010,8 @@ intel_miptree_alloc_hiz(struct intel_context *intel,
struct intel_resolve_map *head = &mt->hiz_map;
for (int level = mt->first_level; level <= mt->last_level; ++level) {
for (int layer = 0; layer < mt->level[level].depth; ++layer) {
+ mt->level[level].slice[layer].has_hiz = true;
+
head->next = malloc(sizeof(*head->next));
head->next->prev = head;
head->next->next = NULL;
@@ -1024,6 +1026,18 @@ intel_miptree_alloc_hiz(struct intel_context *intel,
return true;
}
+/**
+ * Does the miptree slice have hiz enabled?
+ */
+bool
+intel_miptree_slice_has_hiz(struct intel_mipmap_tree *mt,
+ uint32_t level,
+ uint32_t layer)
+{
+ intel_miptree_check_level_layer(mt, level, layer);
+ return mt->level[level].slice[layer].has_hiz;
+}
+
void
intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt,
uint32_t level,
diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
index 3bdda07edce..29cd09d9194 100644
--- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.h
@@ -152,6 +152,15 @@ struct intel_mipmap_level
* intel_miptree_map/unmap on this slice.
*/
struct intel_miptree_map *map;
+
+ /**
+ * \brief Is HiZ enabled for this slice?
+ *
+ * If \c mt->level[l].slice[s].has_hiz is set, then (1) \c mt->hiz_mt
+ * has been allocated and (2) the HiZ memory corresponding to this slice
+ * resides at \c mt->hiz_mt->level[l].slice[s].
+ */
+ bool has_hiz;
} *slice;
};
@@ -333,9 +342,11 @@ struct intel_mipmap_tree
/**
* \brief HiZ miptree
*
- * This is non-null only if HiZ is enabled for this miptree.
+ * The hiz miptree contains the miptree's hiz buffer. To allocate the hiz
+ * miptree, use intel_miptree_alloc_hiz().
*
- * \see intel_miptree_alloc_hiz()
+ * To determine if hiz is enabled, do not check this pointer. Instead, use
+ * intel_miptree_slice_has_hiz().
*/
struct intel_mipmap_tree *hiz_mt;
@@ -532,6 +543,11 @@ intel_miptree_alloc_hiz(struct intel_context *intel,
struct intel_mipmap_tree *mt,
GLuint num_samples);
+bool
+intel_miptree_slice_has_hiz(struct intel_mipmap_tree *mt,
+ uint32_t level,
+ uint32_t layer);
+
void
intel_miptree_slice_set_needs_hiz_resolve(struct intel_mipmap_tree *mt,
uint32_t level,