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authorEric Anholt <[email protected]>2010-09-24 16:11:40 -0700
committerEric Anholt <[email protected]>2010-09-24 16:12:50 -0700
commit1946b81e700fbb266294b8c1cb0d29ced84bf647 (patch)
tree9de012f436c9cd081e455d79f01d884c0315f183 /src/mesa
parent836803df794be7a2ae3be0fc047e882d49ab22bb (diff)
i965: Add support for rendering to SARGB8 FBOs.
Tested with fbo-generatemipmap-formats GL_EXT_texture_srgb. The test still fails on SLA8, though.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_surface_state.c3
-rw-r--r--src/mesa/drivers/dri/intel/intel_fbo.c5
-rw-r--r--src/mesa/drivers/dri/intel/intel_span.c1
3 files changed, 9 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
index 17b016b569b..05f1aa18137 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
@@ -429,6 +429,9 @@ brw_update_renderbuffer_surface(struct brw_context *brw,
case MESA_FORMAT_XRGB8888:
key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
break;
+ case MESA_FORMAT_SARGB8:
+ key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB;
+ break;
case MESA_FORMAT_RGB565:
key.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
break;
diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c
index 4ad85eb7c1a..64c94b9b556 100644
--- a/src/mesa/drivers/dri/intel/intel_fbo.c
+++ b/src/mesa/drivers/dri/intel/intel_fbo.c
@@ -433,6 +433,10 @@ intel_update_wrapper(GLcontext *ctx, struct intel_renderbuffer *irb,
irb->Base.DataType = GL_UNSIGNED_BYTE;
DBG("Render to XGBA8 texture OK\n");
}
+ else if (texImage->TexFormat == MESA_FORMAT_SARGB8) {
+ irb->Base.DataType = GL_UNSIGNED_BYTE;
+ DBG("Render to SARGB8 texture OK\n");
+ }
else if (texImage->TexFormat == MESA_FORMAT_RGB565) {
irb->Base.DataType = GL_UNSIGNED_BYTE;
DBG("Render to RGB5 texture OK\n");
@@ -659,6 +663,7 @@ intel_validate_framebuffer(GLcontext *ctx, struct gl_framebuffer *fb)
switch (irb->Base.Format) {
case MESA_FORMAT_ARGB8888:
case MESA_FORMAT_XRGB8888:
+ case MESA_FORMAT_SARGB8:
case MESA_FORMAT_RGB565:
case MESA_FORMAT_ARGB1555:
case MESA_FORMAT_ARGB4444:
diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c
index fb840c1020d..c8d55c92a0b 100644
--- a/src/mesa/drivers/dri/intel/intel_span.c
+++ b/src/mesa/drivers/dri/intel/intel_span.c
@@ -366,6 +366,7 @@ intel_set_span_functions(struct intel_context *intel,
intel_InitPointers_xRGB8888(rb);
break;
case MESA_FORMAT_ARGB8888:
+ case MESA_FORMAT_SARGB8:
intel_InitPointers_ARGB8888(rb);
break;
case MESA_FORMAT_Z16: