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authorEric Anholt <[email protected]>2007-10-04 11:16:50 -0700
committerEric Anholt <[email protected]>2007-10-04 12:28:49 -0700
commit0fc9efd8f0b1b6c4e3525a50e3478e5aef72531a (patch)
tree8f419632cd6e99aef02d320cfff57b38d4acbb26 /src/mesa
parent6bac9478c39fbe7955d10a21a2d7743697427a56 (diff)
Replace bmBufferOffset usage in batchbuffer setup with OUT_RELOC.
This is in preparation for 965 TTM.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_draw_upload.c8
-rw-r--r--src/mesa/drivers/dri/i965/intel_batchbuffer.h6
-rw-r--r--src/mesa/drivers/dri/i965/intel_blit.c30
3 files changed, 29 insertions, 15 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c
index fc2e3035af1..89cd063d460 100644
--- a/src/mesa/drivers/dri/i965/brw_draw_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c
@@ -541,7 +541,8 @@ GLboolean brw_upload_vertices( struct brw_context *brw,
for (i = 0; i < nr_enabled; i++) {
OUT_BATCH( vbp.vb[i].vb0.dword );
- OUT_BATCH( bmBufferOffset(&brw->intel, vbp.vb[i].buffer) + vbp.vb[i].offset);
+ OUT_RELOC( vbp.vb[i].buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ vbp.vb[i].offset);
OUT_BATCH( vbp.vb[i].max_index );
OUT_BATCH( vbp.vb[i].instance_data_step_rate );
}
@@ -632,8 +633,9 @@ void brw_upload_indices( struct brw_context *brw,
BEGIN_BATCH(4, 0);
OUT_BATCH( ib.header.dword );
- OUT_BATCH( bmBufferOffset(intel, buffer) + offset );
- OUT_BATCH( bmBufferOffset(intel, buffer) + offset + ib_size );
+ OUT_RELOC( buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, offset);
+ OUT_RELOC( buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ offset + ib_size);
OUT_BATCH( 0 );
ADVANCE_BATCH();
}
diff --git a/src/mesa/drivers/dri/i965/intel_batchbuffer.h b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
index 25e0a65e99f..c40cad96383 100644
--- a/src/mesa/drivers/dri/i965/intel_batchbuffer.h
+++ b/src/mesa/drivers/dri/i965/intel_batchbuffer.h
@@ -121,6 +121,12 @@ void intel_batchbuffer_align( struct intel_batchbuffer *batch,
#define BATCH_LOCALS
#define BEGIN_BATCH(n, flags) intel_batchbuffer_require_space(intel->batch, n*4, flags)
#define OUT_BATCH(d) intel_batchbuffer_emit_dword(intel->batch, d)
+
+#define OUT_RELOC(buf, flags, delta) do { \
+ assert((delta) >= 0); \
+ OUT_BATCH(bmBufferOffset(intel, buf) + delta); \
+} while (0)
+
#define ADVANCE_BATCH() do { } while(0)
diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c
index 962bb24f67a..7a9e1a2a3f8 100644
--- a/src/mesa/drivers/dri/i965/intel_blit.c
+++ b/src/mesa/drivers/dri/i965/intel_blit.c
@@ -144,10 +144,10 @@ void intelCopyBuffer( const __DRIdrawablePrivate *dPriv,
OUT_BATCH( dst_pitch | BR13 );
OUT_BATCH( (tmp.y1 << 16) | tmp.x1 );
OUT_BATCH( (tmp.y2 << 16) | tmp.x2 );
- OUT_BATCH( bmBufferOffset(intel, dst->buffer) );
+ OUT_RELOC( dst->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, 0 );
OUT_BATCH( (tmp.y1 << 16) | tmp.x1 );
OUT_BATCH( src_pitch );
- OUT_BATCH( bmBufferOffset(intel, src->buffer) );
+ OUT_RELOC( src->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ, 0 );
ADVANCE_BATCH();
}
}
@@ -214,7 +214,7 @@ void intelEmitFillBlit( struct intel_context *intel,
OUT_BATCH( dst_pitch | BR13 );
OUT_BATCH( (y << 16) | x );
OUT_BATCH( ((y+h) << 16) | (x+w) );
- OUT_BATCH( bmBufferOffset(intel, dst_buffer) + dst_offset );
+ OUT_RELOC( dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, dst_offset );
OUT_BATCH( color );
ADVANCE_BATCH();
}
@@ -325,10 +325,12 @@ void intelEmitCopyBlit( struct intel_context *intel,
OUT_BATCH( dst_pitch | BR13 );
OUT_BATCH( (dst_y << 16) | dst_x );
OUT_BATCH( (dst_y2 << 16) | dst_x2 );
- OUT_BATCH( bmBufferOffset(intel, dst_buffer) + dst_offset );
+ OUT_RELOC( dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
+ dst_offset );
OUT_BATCH( (src_y << 16) | src_x );
OUT_BATCH( src_pitch );
- OUT_BATCH( bmBufferOffset(intel, src_buffer) + src_offset );
+ OUT_RELOC( src_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ src_offset );
ADVANCE_BATCH();
}
else {
@@ -337,10 +339,11 @@ void intelEmitCopyBlit( struct intel_context *intel,
OUT_BATCH( (dst_pitch & 0xffff) | BR13 );
OUT_BATCH( (0 << 16) | dst_x );
OUT_BATCH( (h << 16) | dst_x2 );
- OUT_BATCH( bmBufferOffset(intel, dst_buffer) + dst_offset + dst_y * dst_pitch );
- OUT_BATCH( (0 << 16) | src_x );
+ OUT_RELOC( dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
+ dst_offset + dst_y * dst_pitch );
OUT_BATCH( (src_pitch & 0xffff) );
- OUT_BATCH( bmBufferOffset(intel, src_buffer) + src_offset + src_y * src_pitch );
+ OUT_RELOC( src_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_READ,
+ src_offset + src_y * src_pitch );
ADVANCE_BATCH();
}
}
@@ -480,7 +483,8 @@ void intelClearWithBlit(GLcontext *ctx, GLbitfield flags)
OUT_BATCH( front_pitch | BR13 );
OUT_BATCH( (b.y1 << 16) | b.x1 );
OUT_BATCH( (b.y2 << 16) | b.x2 );
- OUT_BATCH( bmBufferOffset(intel, front->buffer) );
+ OUT_RELOC( front->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
+ 0 );
OUT_BATCH( clear_color );
ADVANCE_BATCH();
}
@@ -491,7 +495,8 @@ void intelClearWithBlit(GLcontext *ctx, GLbitfield flags)
OUT_BATCH( back_pitch | BR13 );
OUT_BATCH( (b.y1 << 16) | b.x1 );
OUT_BATCH( (b.y2 << 16) | b.x2 );
- OUT_BATCH( bmBufferOffset(intel, back->buffer) );
+ OUT_RELOC( back->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
+ 0 );
OUT_BATCH( clear_color );
ADVANCE_BATCH();
}
@@ -502,7 +507,8 @@ void intelClearWithBlit(GLcontext *ctx, GLbitfield flags)
OUT_BATCH( depth_pitch | BR13 );
OUT_BATCH( (b.y1 << 16) | b.x1 );
OUT_BATCH( (b.y2 << 16) | b.x2 );
- OUT_BATCH( bmBufferOffset(intel, depth->buffer) );
+ OUT_RELOC( depth->buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE,
+ 0 );
OUT_BATCH( clear_depth );
ADVANCE_BATCH();
}
@@ -582,7 +588,7 @@ intelEmitImmediateColorExpandBlit(struct intel_context *intel,
OUT_BATCH(br13);
OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
- OUT_BATCH(bmBufferOffset(intel, dst_buffer) + dst_offset);
+ OUT_RELOC(dst_buffer, DRM_BO_FLAG_MEM_TT | DRM_BO_FLAG_WRITE, dst_offset);
OUT_BATCH(0); /* bg */
OUT_BATCH(fg_color); /* fg */
OUT_BATCH(0); /* pattern base addr */