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authorKenneth Graunke <[email protected]>2012-08-07 09:13:04 -0700
committerKenneth Graunke <[email protected]>2012-08-08 09:24:16 -0700
commitc4c78c275abffe8d1014b1355f02239859d6aa2b (patch)
tree9978862437c43354412a9d917c4061194de77ec1 /src/mesa
parent03f14664b6b12bc7853866fe613d8af350e51e08 (diff)
i965: Use 64-bit writes for timestamp queries.
The hardware seems to use the length of the PIPE_CONTROL command to indicate whether the write is 64-bits or 32-bits. Which makes sense for immediate writes. Daniel discovered this by writing a pattern into the query object bo and noticing that the high 32-bits were left intact, even on those pipe control writes that seemingly worked. Signed-off-by: Daniel Vetter <[email protected]> Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_queryobj.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c
index 229aeb7ce16..afa30914f93 100644
--- a/src/mesa/drivers/dri/i965/brw_queryobj.c
+++ b/src/mesa/drivers/dri/i965/brw_queryobj.c
@@ -49,14 +49,15 @@ static void
write_timestamp(struct intel_context *intel, drm_intel_bo *query_bo, int idx)
{
if (intel->gen >= 6) {
- BEGIN_BATCH(4);
- OUT_BATCH(_3DSTATE_PIPE_CONTROL | (4 - 2));
+ BEGIN_BATCH(5);
+ OUT_BATCH(_3DSTATE_PIPE_CONTROL | (5 - 2));
OUT_BATCH(PIPE_CONTROL_WRITE_TIMESTAMP);
OUT_RELOC(query_bo,
I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION,
PIPE_CONTROL_GLOBAL_GTT_WRITE |
idx * sizeof(uint64_t));
OUT_BATCH(0);
+ OUT_BATCH(0);
ADVANCE_BATCH();
} else {
BEGIN_BATCH(4);