diff options
| author | Anuj Phogat <[email protected]> | 2017-11-14 14:48:21 -0800 |
|---|---|---|
| committer | Anuj Phogat <[email protected]> | 2017-11-17 11:51:28 -0800 |
| commit | 822fd2341db49cbbe813114d2d0fc1b66de4807c (patch) | |
| tree | 391c2d9809b4039a6721531f56d819af731ef48b /src/mesa | |
| parent | a07f7b26198ce0f5c8799481a673754968ac5daf (diff) | |
i965: Remove DWord length from MI_FLUSH_DW definition
Fixes: 6165fda59b8 ("i965: Program DWord Length in MI_FLUSH_DW")
Cc: <[email protected]>
Signed-off-by: Anuj Phogat <[email protected]>
Reviewed-by: Nanley Chery <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_defines.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h index 26f6ae6b2fc..59d9e5cf21b 100644 --- a/src/mesa/drivers/dri/i965/brw_defines.h +++ b/src/mesa/drivers/dri/i965/brw_defines.h @@ -1430,7 +1430,7 @@ enum brw_pixel_shader_coverage_mask_mode { #define MI_LOAD_REGISTER_IMM (CMD_MI | (0x22 << 23)) #define MI_LOAD_REGISTER_REG (CMD_MI | (0x2A << 23)) -#define MI_FLUSH_DW (CMD_MI | (0x26 << 23) | 2) +#define MI_FLUSH_DW (CMD_MI | (0x26 << 23)) #define MI_STORE_REGISTER_MEM (CMD_MI | (0x24 << 23)) # define MI_STORE_REGISTER_MEM_USE_GGTT (1 << 22) |