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authorZhenyu Wang <[email protected]>2011-01-04 13:57:16 +0800
committerZhenyu Wang <[email protected]>2011-01-04 13:57:16 +0800
commit1df795f95868998c4f72d11a8dc394e0615ac417 (patch)
tree670e1bc534d8b5fe2b2a41e2513eed3822c89288 /src/mesa
parent9977297ad9bc0e816810bd3a39d89e5c1cffff72 (diff)
i965: Correct comment for gen6 fb write control message setting
Remove incorrect headless comment for gen6 fb write message. Note current SIMD16 mode has already done right for control message.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm_emit.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index 56725c0d471..2336e27c1ef 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -1333,9 +1333,11 @@ static void fire_fb_write( struct brw_wm_compile *c,
dst = retype(vec8(brw_null_reg()), BRW_REGISTER_TYPE_UW);
/* Pass through control information:
+ *
+ * Gen6 has done m1 mov in emit_fb_write() for current SIMD16 case.
*/
/* mov (8) m1.0<1>:ud r1.0<8;8,1>:ud { Align1 NoMask } */
- if (intel->gen < 6) /* gen6, use headerless for fb write */
+ if (intel->gen < 6)
{
brw_push_insn_state(p);
brw_set_mask_control(p, BRW_MASK_DISABLE); /* ? */