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authorJason Ekstrand <[email protected]>2016-09-08 14:08:02 -0700
committerJason Ekstrand <[email protected]>2016-09-08 20:53:01 -0700
commit175ac629be1396fb8566836e32961a22fc5cca21 (patch)
tree5febc38751fbcc643b9cf0e7a55ab790549d37b1 /src/mesa
parent88a2a2e05302179c59e257533ed77d2d0a6a5021 (diff)
i965/fs: Fail the shader compile instead of asserting when we can't spill
Blorp doesn't handle spilling so we set allow_spilling to false in that case. The blorp 16x MSAA resolve shader spills in 16-wide but not 8-wide. This commit makes it so that we fail the 16-wide compile and successfully fall back to 8-wide instead of just assert-failing when trying to compile the 16-wide shader. Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Francisco Jerez <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index d0b55aeb513..75642d3f1e1 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -5906,6 +5906,9 @@ fs_visitor::allocate_registers(bool allow_spilling)
}
if (!allocated_without_spills) {
+ if (!allow_spilling)
+ fail("Failure to register allocate and spilling is not allowed.");
+
/* We assume that any spilling is worse than just dropping back to
* SIMD8. There's probably actually some intermediate point where
* SIMD16 with a couple of spills is still better.
@@ -5930,8 +5933,6 @@ fs_visitor::allocate_registers(bool allow_spilling)
}
}
- assert(last_scratch == 0 || allow_spilling);
-
/* This must come after all optimization and register allocation, since
* it inserts dead code that happens to have side effects, and it does
* so based on the actual physical registers in use.