diff options
author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2016-06-10 08:23:40 +0300 |
---|---|---|
committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2016-11-25 16:57:06 +0200 |
commit | 12010b92263dd63a6cef785c730ff877f7912cc8 (patch) | |
tree | 0e5f0799f5f849fc8de7b888e7a2417b7dd054fd /src/mesa | |
parent | 71d48d6f42c3ae03b797c25d58f2f1f4dcd8fc29 (diff) |
i965: Add new interface for full color resolves
Upcoming patches will introduce fast clear in level/layer
granularity like the driver does already for depth/hiz. This patch
introduces equivalent full resolve option.
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_context.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_copy_image.c | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 11 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_pixel_bitmap.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_pixel_read.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_tex_image.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_tex_subimage.c | 2 |
8 files changed, 23 insertions, 11 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 0c4783288d8..3f88f7fa221 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -263,7 +263,7 @@ intel_update_state(struct gl_context * ctx, GLuint new_state) */ const int flags = intel_texture_view_requires_resolve(brw, tex_obj) ? 0 : INTEL_MIPTREE_IGNORE_CCS_E; - intel_miptree_resolve_color(brw, tex_obj->mt, flags); + intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, flags); brw_render_cache_set_check_flush(brw, tex_obj->mt->bo); if (tex_obj->base.StencilSampling || @@ -291,7 +291,7 @@ intel_update_state(struct gl_context * ctx, GLuint new_state) * compressed surfaces need to be resolved prior to accessing * them. Hence skip setting INTEL_MIPTREE_IGNORE_CCS_E. */ - intel_miptree_resolve_color(brw, tex_obj->mt, 0); + intel_miptree_all_slices_resolve_color(brw, tex_obj->mt, 0); if (intel_miptree_is_lossless_compressed(brw, tex_obj->mt) && intel_disable_rb_aux_buffer(brw, tex_obj->mt->bo)) { @@ -348,7 +348,7 @@ intel_update_state(struct gl_context * ctx, GLuint new_state) * should be impossible to get here with such surfaces. */ assert(!intel_miptree_is_lossless_compressed(brw, mt)); - intel_miptree_resolve_color(brw, mt, 0); + intel_miptree_all_slices_resolve_color(brw, mt, 0); brw_render_cache_set_check_flush(brw, mt->bo); } } diff --git a/src/mesa/drivers/dri/i965/intel_copy_image.c b/src/mesa/drivers/dri/i965/intel_copy_image.c index 7698d8ed90b..3b5bf31f5d2 100644 --- a/src/mesa/drivers/dri/i965/intel_copy_image.c +++ b/src/mesa/drivers/dri/i965/intel_copy_image.c @@ -227,11 +227,11 @@ copy_miptrees(struct brw_context *brw, */ intel_miptree_all_slices_resolve_hiz(brw, src_mt); intel_miptree_all_slices_resolve_depth(brw, src_mt); - intel_miptree_resolve_color(brw, src_mt, 0); + intel_miptree_all_slices_resolve_color(brw, src_mt, 0); intel_miptree_all_slices_resolve_hiz(brw, dst_mt); intel_miptree_all_slices_resolve_depth(brw, dst_mt); - intel_miptree_resolve_color(brw, dst_mt, 0); + intel_miptree_all_slices_resolve_color(brw, dst_mt, 0); _mesa_get_format_block_size(src_mt->format, &bw, &bh); diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 00ae7ba1100..328c770f93d 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -2237,6 +2237,13 @@ intel_miptree_resolve_color(struct brw_context *brw, } } +void +intel_miptree_all_slices_resolve_color(struct brw_context *brw, + struct intel_mipmap_tree *mt, + int flags) +{ + intel_miptree_resolve_color(brw, mt, flags); +} /** * Make it possible to share the BO backing the given miptree with another @@ -2259,7 +2266,7 @@ intel_miptree_make_shareable(struct brw_context *brw, assert(mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE); if (mt->mcs_buf) { - intel_miptree_resolve_color(brw, mt, 0); + intel_miptree_all_slices_resolve_color(brw, mt, 0); mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_NO_MCS; } } @@ -2416,7 +2423,7 @@ intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt) /* CPU accesses to color buffers don't understand fast color clears, so * resolve any pending fast color clears before we map. */ - intel_miptree_resolve_color(brw, mt, 0); + intel_miptree_all_slices_resolve_color(brw, mt, 0); drm_intel_bo *bo = mt->bo; diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h index 7ad074c1acc..80cc876b7ce 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h @@ -994,6 +994,11 @@ intel_miptree_resolve_color(struct brw_context *brw, int flags); void +intel_miptree_all_slices_resolve_color(struct brw_context *brw, + struct intel_mipmap_tree *mt, + int flags); + +void intel_miptree_make_shareable(struct brw_context *brw, struct intel_mipmap_tree *mt); diff --git a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c index 8381fe6367e..4522d28a4e1 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c @@ -256,7 +256,7 @@ do_blit_bitmap( struct gl_context *ctx, /* The blitter has no idea about fast color clears, so we need to resolve * the miptree before we do anything. */ - intel_miptree_resolve_color(brw, irb->mt, 0); + intel_miptree_all_slices_resolve_color(brw, irb->mt, 0); /* Chop it all into chunks that can be digested by hardware: */ for (py = 0; py < height; py += DY) { diff --git a/src/mesa/drivers/dri/i965/intel_pixel_read.c b/src/mesa/drivers/dri/i965/intel_pixel_read.c index cacd7e277c8..c15f891de3f 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_read.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_read.c @@ -138,7 +138,7 @@ intel_readpixels_tiled_memcpy(struct gl_context * ctx, /* Since we are going to read raw data to the miptree, we need to resolve * any pending fast color clears before we start. */ - intel_miptree_resolve_color(brw, irb->mt, 0); + intel_miptree_all_slices_resolve_color(brw, irb->mt, 0); bo = irb->mt->bo; diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index cbff58a6a84..141996f7076 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -523,7 +523,7 @@ intel_gettexsubimage_tiled_memcpy(struct gl_context *ctx, /* Since we are going to write raw data to the miptree, we need to resolve * any pending fast color clears before we start. */ - intel_miptree_resolve_color(brw, image->mt, 0); + intel_miptree_all_slices_resolve_color(brw, image->mt, 0); bo = image->mt->bo; diff --git a/src/mesa/drivers/dri/i965/intel_tex_subimage.c b/src/mesa/drivers/dri/i965/intel_tex_subimage.c index 74d4c57391d..b7e52bc4817 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_subimage.c +++ b/src/mesa/drivers/dri/i965/intel_tex_subimage.c @@ -139,7 +139,7 @@ intel_texsubimage_tiled_memcpy(struct gl_context * ctx, /* Since we are going to write raw data to the miptree, we need to resolve * any pending fast color clears before we start. */ - intel_miptree_resolve_color(brw, image->mt, 0); + intel_miptree_all_slices_resolve_color(brw, image->mt, 0); bo = image->mt->bo; |