diff options
author | Brian Paul <[email protected]> | 2009-09-25 09:00:19 -0600 |
---|---|---|
committer | Brian Paul <[email protected]> | 2009-09-25 09:00:19 -0600 |
commit | ecf3091cc78638919f1977ccc0307c51b6731385 (patch) | |
tree | e8dca04db94ce566f3dadf148236b5a4d0c901cb /src/mesa | |
parent | 5f4f7ad965c40327f16297606ed4f425598bfc2c (diff) | |
parent | 46da1f2c9b67e3b4c3659f2d029140b639571407 (diff) |
Merge branch 'mesa_7_6_branch'
Conflicts:
src/mesa/drivers/dri/intel/intel_clear.c
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state.h | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_batch.c | 15 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_state_upload.c | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_buffer_objects.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_clear.c | 1 | ||||
-rw-r--r-- | src/mesa/shader/nvvertparse.c | 5 |
6 files changed, 13 insertions, 22 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h index 78572356a3d..5335eac8951 100644 --- a/src/mesa/drivers/dri/i965/brw_state.h +++ b/src/mesa/drivers/dri/i965/brw_state.h @@ -86,9 +86,6 @@ const struct brw_tracked_state brw_psp_urb_cbs; const struct brw_tracked_state brw_pipe_control; -const struct brw_tracked_state brw_clear_surface_cache; -const struct brw_tracked_state brw_clear_batch_cache; - const struct brw_tracked_state brw_drawing_rect; const struct brw_tracked_state brw_indices; const struct brw_tracked_state brw_vertices; @@ -165,7 +162,7 @@ GLboolean brw_cached_batch_struct( struct brw_context *brw, const void *data, GLuint sz ); void brw_destroy_batch_cache( struct brw_context *brw ); -void brw_clear_batch_cache_flush( struct brw_context *brw ); +void brw_clear_batch_cache( struct brw_context *brw ); /* brw_wm_surface_state.c */ dri_bo * diff --git a/src/mesa/drivers/dri/i965/brw_state_batch.c b/src/mesa/drivers/dri/i965/brw_state_batch.c index 811940edc05..7821898cf9b 100644 --- a/src/mesa/drivers/dri/i965/brw_state_batch.c +++ b/src/mesa/drivers/dri/i965/brw_state_batch.c @@ -79,7 +79,7 @@ GLboolean brw_cached_batch_struct( struct brw_context *brw, return GL_TRUE; } -static void clear_batch_cache( struct brw_context *brw ) +void brw_clear_batch_cache( struct brw_context *brw ) { struct brw_cached_batch_item *item = brw->cached_batch_items; @@ -93,18 +93,7 @@ static void clear_batch_cache( struct brw_context *brw ) brw->cached_batch_items = NULL; } -void brw_clear_batch_cache_flush( struct brw_context *brw ) -{ - clear_batch_cache(brw); - - brw->state.dirty.mesa |= ~0; - brw->state.dirty.brw |= ~0; - brw->state.dirty.cache |= ~0; -} - - - void brw_destroy_batch_cache( struct brw_context *brw ) { - clear_batch_cache(brw); + brw_clear_batch_cache(brw); } diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index 414620d0b39..b817b741e77 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -287,6 +287,7 @@ void brw_validate_state( struct brw_context *brw ) if (brw->emit_state_always) { state->mesa |= ~0; state->brw |= ~0; + state->cache |= ~0; } if (brw->fragment_program != ctx->FragmentProgram._Current) { @@ -305,7 +306,7 @@ void brw_validate_state( struct brw_context *brw ) return; if (brw->state.dirty.brw & BRW_NEW_CONTEXT) - brw_clear_batch_cache_flush(brw); + brw_clear_batch_cache(brw); brw->intel.Fallback = 0; diff --git a/src/mesa/drivers/dri/intel/intel_buffer_objects.c b/src/mesa/drivers/dri/intel/intel_buffer_objects.c index c55c5c426e0..7f6fb66d52f 100644 --- a/src/mesa/drivers/dri/intel/intel_buffer_objects.c +++ b/src/mesa/drivers/dri/intel/intel_buffer_objects.c @@ -207,8 +207,12 @@ intel_bufferobj_subdata(GLcontext * ctx, if (intel_obj->sys_buffer) memcpy((char *)intel_obj->sys_buffer + offset, data, size); - else + else { + /* Flush any existing batchbuffer that might reference this data. */ + intelFlush(ctx); + dri_bo_subdata(intel_obj->buffer, offset, size, data); + } } diff --git a/src/mesa/drivers/dri/intel/intel_clear.c b/src/mesa/drivers/dri/intel/intel_clear.c index fef977f4655..fb62f0f430a 100644 --- a/src/mesa/drivers/dri/intel/intel_clear.c +++ b/src/mesa/drivers/dri/intel/intel_clear.c @@ -173,7 +173,6 @@ intelClear(GLcontext *ctx, GLbitfield mask) } _mesa_meta_Clear(&intel->ctx, tri_mask); - intel_batchbuffer_flush(intel->batch); } if (swrast_mask) { diff --git a/src/mesa/shader/nvvertparse.c b/src/mesa/shader/nvvertparse.c index 6ab8a14cb9b..8574016050c 100644 --- a/src/mesa/shader/nvvertparse.c +++ b/src/mesa/shader/nvvertparse.c @@ -1415,9 +1415,10 @@ _mesa_parse_nv_vertex_program(GLcontext *ctx, GLenum dstTarget, * upload everything, _mesa_layout_parameters is the answer. */ for (i = 0; i < MAX_NV_VERTEX_PROGRAM_PARAMS; i++) { + GLint index; state_tokens[2] = i; - int index = _mesa_add_state_reference(program->Base.Parameters, - state_tokens); + index = _mesa_add_state_reference(program->Base.Parameters, + state_tokens); assert(index == i); } program->Base.NumParameters = program->Base.Parameters->NumParameters; |